Commit fd1c6f13 authored by Balsam CHIHI's avatar Balsam CHIHI Committed by Matthias Brugger
Browse files

arm64: dts: mediatek: mt8195: Add thermal zones and thermal nodes 



Add thermal zones and thermal nodes for the mt8195.

Signed-off-by: default avatarBalsam CHIHI <bchihi@baylibre.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230209105628.50294-6-bchihi@baylibre.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 91e217d4

arch/arm64/boot/dts/mediatek/mt8195.dtsi

+129 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 
#include <dt-bindings/pinctrl/mt8195-pinfunc.h>

#include <dt-bindings/power/mt8195-power.h>

#include <dt-bindings/reset/mt8195-resets.h>

#include <dt-bindings/thermal/mediatek,lvts-thermal.h>



/ {

	compatible = "mediatek,mt8195";
@@ -1105,6 +1106,17 @@ 
			status = "disabled";

		};



		lvts_ap: thermal-sensor@1100b000 {

			compatible = "mediatek,mt8195-lvts-ap";

			reg = <0 0x1100b000 0 0x1000>;

			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;

			clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;

			resets = <&infracfg_ao MT8195_INFRA_RST0_THERM_CTRL_SWRST>;

			nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>;

			nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";

			#thermal-sensor-cells = <1>;

		};



		spi1: spi@11010000 {

			compatible = "mediatek,mt8195-spi",

				     "mediatek,mt6765-spi";
@@ -1357,6 +1369,17 @@ 
			status = "disabled";

		};



		lvts_mcu: thermal-sensor@11278000 {

			compatible = "mediatek,mt8195-lvts-mcu";

			reg = <0 0x11278000 0 0x1000>;

			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;

			clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;

			resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>;

			nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>;

			nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";

			#thermal-sensor-cells = <1>;

		};



		xhci1: usb@11290000 {

			compatible = "mediatek,mt8195-xhci",

				     "mediatek,mtk-xhci";
@@ -2976,4 +2999,110 @@ 
			status = "disabled";

		};

	};



	thermal_zones: thermal-zones {

		cpu0-thermal {

			polling-delay = <0>;

			polling-delay-passive = <0>;

			thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>;

			trips {

				cpu0_crit: trip-crit {

					temperature = <100000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};

		};



		cpu1-thermal {

			polling-delay = <0>;

			polling-delay-passive = <0>;

			thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU1>;

			trips {

				cpu1_crit: trip-crit {

					temperature = <100000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};

		};



		cpu2-thermal {

			polling-delay = <0>;

			polling-delay-passive = <0>;

			thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU2>;

			trips {

				cpu2_crit: trip-crit {

					temperature = <100000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};

		};



		cpu3-thermal {

			polling-delay = <0>;

			polling-delay-passive = <0>;

			thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU3>;

			trips {

				cpu3_crit: trip-crit {

					temperature = <100000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};

		};



		cpu4-thermal {

			polling-delay = <0>;

			polling-delay-passive = <0>;

			thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU0>;

			trips {

				cpu4_crit: trip-crit {

					temperature = <100000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};

		};



		cpu5-thermal {

			polling-delay = <0>;

			polling-delay-passive = <0>;

			thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU1>;

			trips {

				cpu5_crit: trip-crit {

					temperature = <100000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};

		};



		cpu6-thermal {

			polling-delay = <0>;

			polling-delay-passive = <0>;

			thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU2>;

			trips {

				cpu6_crit: trip-crit {

					temperature = <100000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};

		};



		cpu7-thermal {

			polling-delay = <0>;

			polling-delay-passive = <0>;

			thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU3>;

			trips {

				cpu7_crit: trip-crit {

					temperature = <100000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};

		};

	};

};