Commit fd13daea authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
Browse files

powerpc/64s: make mmu_partition_table_set_entry TLB flush optional 



No functional change.

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20190902152931.17840-4-npiggin@gmail.com
parent 99161de3

arch/powerpc/include/asm/mmu.h

+1 −1
Original line number Diff line number Diff line
@@ -257,7 +257,7 @@ extern void radix__mmu_cleanup_all(void); 
/* Functions for creating and updating partition table on POWER9 */

extern void mmu_partition_table_init(void);

extern void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,

					  unsigned long dw1);

					  unsigned long dw1, bool flush);

#endif /* CONFIG_PPC64 */



struct mm_struct;

arch/powerpc/kvm/book3s_hv_nested.c

+1 −1
Original line number Diff line number Diff line
@@ -411,7 +411,7 @@ static void kvmhv_flush_lpid(unsigned int lpid) 
void kvmhv_set_ptbl_entry(unsigned int lpid, u64 dw0, u64 dw1)

{

	if (!kvmhv_on_pseries()) {

		mmu_partition_table_set_entry(lpid, dw0, dw1);

		mmu_partition_table_set_entry(lpid, dw0, dw1, true);

		return;

	}

arch/powerpc/mm/book3s64/hash_utils.c

+1 −1
Original line number Diff line number Diff line
@@ -825,7 +825,7 @@ static void __init hash_init_partition_table(phys_addr_t hash_table, 
	 * For now, UPRT is 0 and we have no segment table.

	 */

	htab_size =  __ilog2(htab_size) - 18;

	mmu_partition_table_set_entry(0, hash_table | htab_size, 0);

	mmu_partition_table_set_entry(0, hash_table | htab_size, 0, true);

	pr_info("Partition table %p\n", partition_tb);

}

arch/powerpc/mm/book3s64/pgtable.c

+2 −2
Original line number Diff line number Diff line
@@ -224,7 +224,7 @@ static void flush_partition(unsigned int lpid, bool radix) 
}



void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,

				  unsigned long dw1)

				  unsigned long dw1, bool flush)

{

	unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);
@@ -251,7 +251,7 @@ void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0, 
		uv_register_pate(lpid, dw0, dw1);

		pr_info("PATE registered by ultravisor: dw0 = 0x%lx, dw1 = 0x%lx\n",

			dw0, dw1);

	} else {

	} else if (flush) {

		flush_partition(lpid, (old & PATB_HR));

	}

}

arch/powerpc/mm/book3s64/radix_pgtable.c

+1 −1
Original line number Diff line number Diff line
@@ -396,7 +396,7 @@ static void __init radix_init_partition_table(void) 
	rts_field = radix__get_tree_size();

	dw0 = rts_field | __pa(init_mm.pgd) | RADIX_PGD_INDEX_SIZE | PATB_HR;

	dw1 = __pa(process_tb) | (PRTB_SIZE_SHIFT - 12) | PATB_GR;

	mmu_partition_table_set_entry(0, dw0, dw1);

	mmu_partition_table_set_entry(0, dw0, dw1, true);



	asm volatile("ptesync" : : : "memory");

	asm volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :