Commit fd0ed91a authored by Jack Xiao's avatar Jack Xiao Committed by Alex Deucher
Browse files

drm/amdgpu: correct cp doorbell range 



1. move MES doorbell inside the mec doorbell range,
   for mes belongs to mec block
2. setting the correct gfx/mec doorbell range, so that
   fw can correctly detect gfx/compute work load to enter/exit
   power saving state.

Signed-off-by: default avatarJack Xiao <Jack.Xiao@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Tested-and-acked-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ae2d50be

drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h

+8 −3
Original line number Diff line number Diff line
@@ -52,6 +52,8 @@ struct amdgpu_doorbell_index { 
	uint32_t userqueue_end;

	uint32_t gfx_ring0;

	uint32_t gfx_ring1;

	uint32_t gfx_userqueue_start;

	uint32_t gfx_userqueue_end;

	uint32_t sdma_engine[8];

	uint32_t mes_ring0;

	uint32_t mes_ring1;
@@ -175,12 +177,15 @@ typedef enum _AMDGPU_NAVI10_DOORBELL_ASSIGNMENT 
	AMDGPU_NAVI10_DOORBELL_MEC_RING5		= 0x008,

	AMDGPU_NAVI10_DOORBELL_MEC_RING6		= 0x009,

	AMDGPU_NAVI10_DOORBELL_MEC_RING7		= 0x00A,

	AMDGPU_NAVI10_DOORBELL_USERQUEUE_START		= 0x00B,

	AMDGPU_NAVI10_DOORBELL_MES_RING0	        = 0x00B,

	AMDGPU_NAVI10_DOORBELL_MES_RING1		= 0x00C,

	AMDGPU_NAVI10_DOORBELL_USERQUEUE_START		= 0x00D,

	AMDGPU_NAVI10_DOORBELL_USERQUEUE_END		= 0x08A,

	AMDGPU_NAVI10_DOORBELL_GFX_RING0		= 0x08B,

	AMDGPU_NAVI10_DOORBELL_GFX_RING1		= 0x08C,

	AMDGPU_NAVI10_DOORBELL_MES_RING0	        = 0x090,

	AMDGPU_NAVI10_DOORBELL_MES_RING1		= 0x091,

	AMDGPU_NAVI10_DOORBELL_GFX_USERQUEUE_START	= 0x08D,

	AMDGPU_NAVI10_DOORBELL_GFX_USERQUEUE_END	= 0x0FF,



	/* SDMA:256~335*/

	AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE0		= 0x100,

	AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE1		= 0x10A,

drivers/gpu/drm/amd/amdgpu/nv.c

+4 −0
Original line number Diff line number Diff line
@@ -607,6 +607,10 @@ static void nv_init_doorbell_index(struct amdgpu_device *adev) 
	adev->doorbell_index.userqueue_end = AMDGPU_NAVI10_DOORBELL_USERQUEUE_END;

	adev->doorbell_index.gfx_ring0 = AMDGPU_NAVI10_DOORBELL_GFX_RING0;

	adev->doorbell_index.gfx_ring1 = AMDGPU_NAVI10_DOORBELL_GFX_RING1;

	adev->doorbell_index.gfx_userqueue_start =

		AMDGPU_NAVI10_DOORBELL_GFX_USERQUEUE_START;

	adev->doorbell_index.gfx_userqueue_end =

		AMDGPU_NAVI10_DOORBELL_GFX_USERQUEUE_END;

	adev->doorbell_index.mes_ring0 = AMDGPU_NAVI10_DOORBELL_MES_RING0;

	adev->doorbell_index.mes_ring1 = AMDGPU_NAVI10_DOORBELL_MES_RING1;

	adev->doorbell_index.sdma_engine[0] = AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE0;

drivers/gpu/drm/amd/amdgpu/soc21.c

+4 −0
Original line number Diff line number Diff line
@@ -409,6 +409,10 @@ static void soc21_init_doorbell_index(struct amdgpu_device *adev) 
	adev->doorbell_index.userqueue_end = AMDGPU_NAVI10_DOORBELL_USERQUEUE_END;

	adev->doorbell_index.gfx_ring0 = AMDGPU_NAVI10_DOORBELL_GFX_RING0;

	adev->doorbell_index.gfx_ring1 = AMDGPU_NAVI10_DOORBELL_GFX_RING1;

	adev->doorbell_index.gfx_userqueue_start =

		AMDGPU_NAVI10_DOORBELL_GFX_USERQUEUE_START;

	adev->doorbell_index.gfx_userqueue_end =

		AMDGPU_NAVI10_DOORBELL_GFX_USERQUEUE_END;

	adev->doorbell_index.mes_ring0 = AMDGPU_NAVI10_DOORBELL_MES_RING0;

	adev->doorbell_index.mes_ring1 = AMDGPU_NAVI10_DOORBELL_MES_RING1;

	adev->doorbell_index.sdma_engine[0] = AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE0;