Commit fcffbcf4 authored by Nicholas Kazlauskas's avatar Nicholas Kazlauskas Committed by Alex Deucher
Browse files

drm/amd/display: Add DCN3.1 BIOS parser support 



Updated interfaces for multiple eDP backlight caps.
Added support for interpreting the new BIOS command tables on DCN3.1.

Acked-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent bf62221e

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

+113 −0
Original line number Diff line number Diff line
@@ -576,6 +576,13 @@ static struct device_id device_type_from_device_id(uint16_t device_id) 
		result_device_id.device_type = DEVICE_TYPE_LCD;

		result_device_id.enum_id = 1;

		break;

#if defined(CONFIG_DRM_AMD_DC_DCN3_1)



	case ATOM_DISPLAY_LCD2_SUPPORT:

		result_device_id.device_type = DEVICE_TYPE_LCD;

		result_device_id.enum_id = 2;

		break;

#endif



	case ATOM_DISPLAY_DFP1_SUPPORT:

		result_device_id.device_type = DEVICE_TYPE_DFP;
@@ -2155,6 +2162,107 @@ static enum bp_result get_integrated_info_v2_1( 
	return BP_RESULT_OK;

}



#if defined(CONFIG_DRM_AMD_DC_DCN3_1)

static enum bp_result get_integrated_info_v2_2(

	struct bios_parser *bp,

	struct integrated_info *info)

{

	struct atom_integrated_system_info_v2_2 *info_v2_2;

	uint32_t i;



	info_v2_2 = GET_IMAGE(struct atom_integrated_system_info_v2_2,

					DATA_TABLES(integratedsysteminfo));



	if (info_v2_2 == NULL)

		return BP_RESULT_BADBIOSTABLE;



	info->gpu_cap_info =

	le32_to_cpu(info_v2_2->gpucapinfo);

	/*

	* system_config: Bit[0] = 0 : PCIE power gating disabled

	*                       = 1 : PCIE power gating enabled

	*                Bit[1] = 0 : DDR-PLL shut down disabled

	*                       = 1 : DDR-PLL shut down enabled

	*                Bit[2] = 0 : DDR-PLL power down disabled

	*                       = 1 : DDR-PLL power down enabled

	*/

	info->system_config = le32_to_cpu(info_v2_2->system_config);

	info->cpu_cap_info = le32_to_cpu(info_v2_2->cpucapinfo);

	info->memory_type = info_v2_2->memorytype;

	info->ma_channel_number = info_v2_2->umachannelnumber;

	info->dp_ss_control =

		le16_to_cpu(info_v2_2->reserved1);



	for (i = 0; i < NUMBER_OF_UCHAR_FOR_GUID; ++i) {

		info->ext_disp_conn_info.gu_id[i] =

				info_v2_2->extdispconninfo.guid[i];

	}



	for (i = 0; i < MAX_NUMBER_OF_EXT_DISPLAY_PATH; ++i) {

		info->ext_disp_conn_info.path[i].device_connector_id =

		object_id_from_bios_object_id(

		le16_to_cpu(info_v2_2->extdispconninfo.path[i].connectorobjid));



		info->ext_disp_conn_info.path[i].ext_encoder_obj_id =

		object_id_from_bios_object_id(

			le16_to_cpu(

			info_v2_2->extdispconninfo.path[i].ext_encoder_objid));



		info->ext_disp_conn_info.path[i].device_tag =

			le16_to_cpu(

				info_v2_2->extdispconninfo.path[i].device_tag);

		info->ext_disp_conn_info.path[i].device_acpi_enum =

		le16_to_cpu(

			info_v2_2->extdispconninfo.path[i].device_acpi_enum);

		info->ext_disp_conn_info.path[i].ext_aux_ddc_lut_index =

			info_v2_2->extdispconninfo.path[i].auxddclut_index;

		info->ext_disp_conn_info.path[i].ext_hpd_pin_lut_index =

			info_v2_2->extdispconninfo.path[i].hpdlut_index;

		info->ext_disp_conn_info.path[i].channel_mapping.raw =

			info_v2_2->extdispconninfo.path[i].channelmapping;

		info->ext_disp_conn_info.path[i].caps =

				le16_to_cpu(info_v2_2->extdispconninfo.path[i].caps);

	}



	info->ext_disp_conn_info.checksum =

		info_v2_2->extdispconninfo.checksum;



	info->edp1_info.edp_backlight_pwm_hz =

	le16_to_cpu(info_v2_2->edp1_info.edp_backlight_pwm_hz);

	info->edp1_info.edp_ss_percentage =

	le16_to_cpu(info_v2_2->edp1_info.edp_ss_percentage);

	info->edp1_info.edp_ss_rate_10hz =

	le16_to_cpu(info_v2_2->edp1_info.edp_ss_rate_10hz);

	info->edp1_info.edp_pwr_on_off_delay =

		info_v2_2->edp1_info.edp_pwr_on_off_delay;

	info->edp1_info.edp_pwr_on_vary_bl_to_blon =

		info_v2_2->edp1_info.edp_pwr_on_vary_bl_to_blon;

	info->edp1_info.edp_pwr_down_bloff_to_vary_bloff =

		info_v2_2->edp1_info.edp_pwr_down_bloff_to_vary_bloff;

	info->edp1_info.edp_panel_bpc =

		info_v2_2->edp1_info.edp_panel_bpc;

	info->edp1_info.edp_bootup_bl_level =



	info->edp2_info.edp_backlight_pwm_hz =

	le16_to_cpu(info_v2_2->edp2_info.edp_backlight_pwm_hz);

	info->edp2_info.edp_ss_percentage =

	le16_to_cpu(info_v2_2->edp2_info.edp_ss_percentage);

	info->edp2_info.edp_ss_rate_10hz =

	le16_to_cpu(info_v2_2->edp2_info.edp_ss_rate_10hz);

	info->edp2_info.edp_pwr_on_off_delay =

		info_v2_2->edp2_info.edp_pwr_on_off_delay;

	info->edp2_info.edp_pwr_on_vary_bl_to_blon =

		info_v2_2->edp2_info.edp_pwr_on_vary_bl_to_blon;

	info->edp2_info.edp_pwr_down_bloff_to_vary_bloff =

		info_v2_2->edp2_info.edp_pwr_down_bloff_to_vary_bloff;

	info->edp2_info.edp_panel_bpc =

		info_v2_2->edp2_info.edp_panel_bpc;

	info->edp2_info.edp_bootup_bl_level =

		info_v2_2->edp2_info.edp_bootup_bl_level;



	return BP_RESULT_OK;

}

#endif

/*

 * construct_integrated_info

 *
@@ -2202,6 +2310,11 @@ static enum bp_result construct_integrated_info( 
			case 1:

				result = get_integrated_info_v2_1(bp, info);

				break;

#if defined(CONFIG_DRM_AMD_DC_DCN3_1)

			case 2:

				result = get_integrated_info_v2_2(bp, info);

				break;

#endif

			default:

				return result;

			}

drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c

+5 −0
Original line number Diff line number Diff line
@@ -72,6 +72,11 @@ bool dal_bios_parser_init_cmd_tbl_helper2( 
	case DCN_VERSION_2_1:

	case DCN_VERSION_3_0:

	case DCN_VERSION_3_01:

#if defined(CONFIG_DRM_AMD_DC_DCN3_1)

	case DCN_VERSION_3_1:

		*h = dal_cmd_tbl_helper_dce112_get_table2();

		return true;

#endif

	case DCN_VERSION_3_02:

	case DCN_VERSION_3_03:

		*h = dal_cmd_tbl_helper_dce112_get_table2();