Commit fcf5b650 authored by Yaniv Rosner's avatar Yaniv Rosner Committed by David S. Miller
Browse files

bnx2x: Change return status type 



Change return status from u8 to int.

Signed-off-by: default avatarYaniv Rosner <yanivr@broadcom.com>
Signed-off-by: default avatarEilon Greenstein <eilong@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 1ac9e428

drivers/net/bnx2x/bnx2x_link.c

+169 −163
Original line number Diff line number Diff line
@@ -342,7 +342,7 @@ void bnx2x_ets_bw_limit(const struct link_params *params, const u32 cos0_bw, 
	REG_WR(bp, PBF_REG_COS1_WEIGHT, cos1_credit_weight);

}



u8 bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)

int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)

{

	/* ETS disabled configuration*/

	struct bnx2x *bp = params->bp;
@@ -508,7 +508,7 @@ static void bnx2x_emac_init(struct link_params *params, 
	EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + 4, val);

}



static u8 bnx2x_emac_enable(struct link_params *params,

static int bnx2x_emac_enable(struct link_params *params,

			      struct link_vars *vars, u8 lb)

{

	struct bnx2x *bp = params->bp;
@@ -1002,7 +1002,7 @@ void bnx2x_update_pfc(struct link_params *params, 
	REG_WR(bp, NIG_REG_BMAC0_PAUSE_OUT_EN + params->port*4, val);

}



static u8 bnx2x_bmac1_enable(struct link_params *params,

static int bnx2x_bmac1_enable(struct link_params *params,

			      struct link_vars *vars,

			      u8 is_lb)

{
@@ -1066,7 +1066,7 @@ static u8 bnx2x_bmac1_enable(struct link_params *params, 
	return 0;

}



static u8 bnx2x_bmac2_enable(struct link_params *params,

static int bnx2x_bmac2_enable(struct link_params *params,

			      struct link_vars *vars,

			      u8 is_lb)

{
@@ -1131,11 +1131,12 @@ static u8 bnx2x_bmac2_enable(struct link_params *params, 
	return 0;

}



static u8 bnx2x_bmac_enable(struct link_params *params,

static int bnx2x_bmac_enable(struct link_params *params,

			     struct link_vars *vars,

			     u8 is_lb)

{

	u8 rc, port = params->port;

	int rc = 0;

	u8 port = params->port;

	struct bnx2x *bp = params->bp;

	u32 val;

	/* reset and unreset the BigMac */
@@ -1218,7 +1219,7 @@ static void bnx2x_bmac_rx_disable(struct bnx2x *bp, u8 port) 
	}

}



static u8 bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl,

static int bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl,

			    u32 line_speed)

{

	struct bnx2x *bp = params->bp;
@@ -1351,11 +1352,12 @@ static u32 bnx2x_get_emac_base(struct bnx2x *bp, 
/******************************************************************/

/*			CL45 access functions			  */

/******************************************************************/

static u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,

static int bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,

			    u8 devad, u16 reg, u16 val)

{

	u32 tmp, saved_mode;

	u8 i, rc = 0;

	u8 i;

	int rc = 0;

	/*

	 * Set clause 45 mode, slow down the MDIO clock to 2.5MHz

	 * (a value of 49==0x31) and make sure that the AUTO poll is off
@@ -1420,12 +1422,12 @@ static u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy, 
	return rc;

}



static u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy,

static int bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy,

			   u8 devad, u16 reg, u16 *ret_val)

{

	u32 val, saved_mode;

	u16 i;

	u8 rc = 0;

	int rc = 0;

	/*

	 * Set clause 45 mode, slow down the MDIO clock to 2.5MHz

	 * (a value of 49==0x31) and make sure that the AUTO poll is off
@@ -1492,7 +1494,7 @@ static u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy, 
	return rc;

}



u8 bnx2x_phy_read(struct link_params *params, u8 phy_addr,

int bnx2x_phy_read(struct link_params *params, u8 phy_addr,

		   u8 devad, u16 reg, u16 *ret_val)

{

	u8 phy_index;
@@ -1510,7 +1512,7 @@ u8 bnx2x_phy_read(struct link_params *params, u8 phy_addr, 
	return -EINVAL;

}



u8 bnx2x_phy_write(struct link_params *params, u8 phy_addr,

int bnx2x_phy_write(struct link_params *params, u8 phy_addr,

		    u8 devad, u16 reg, u16 val)

{

	u8 phy_index;
@@ -1776,7 +1778,7 @@ static void bnx2x_set_master_ln(struct link_params *params, 
			  (new_master_ln | ser_lane));

}



static u8 bnx2x_reset_unicore(struct link_params *params,

static int bnx2x_reset_unicore(struct link_params *params,

			       struct bnx2x_phy *phy,

			       u8 set_serdes)

{
@@ -2296,7 +2298,7 @@ static void bnx2x_pause_resolve(struct link_vars *vars, u32 pause_result) 
		vars->link_status |= LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE;

}



static u8 bnx2x_direct_parallel_detect_used(struct bnx2x_phy *phy,

static int bnx2x_direct_parallel_detect_used(struct bnx2x_phy *phy,

					     struct link_params *params)

{

	struct bnx2x *bp = params->bp;
@@ -2480,13 +2482,13 @@ static void bnx2x_xgxs_an_resolve(struct bnx2x_phy *phy, 
			LINK_STATUS_PARALLEL_DETECTION_USED;

}



static u8 bnx2x_link_settings_status(struct bnx2x_phy *phy,

static int bnx2x_link_settings_status(struct bnx2x_phy *phy,

				      struct link_params *params,

				      struct link_vars *vars)

{

	struct bnx2x *bp = params->bp;

	u16 new_line_speed, gp_status;

	u8 rc = 0;

	int rc = 0;



	/* Read gp_status */

	CL22_RD_OVER_CL45(bp, phy,
@@ -2659,7 +2661,7 @@ static void bnx2x_set_gmii_tx_driver(struct link_params *params) 
	}

}



static u8 bnx2x_emac_program(struct link_params *params,

static int bnx2x_emac_program(struct link_params *params,

			      struct link_vars *vars)

{

	struct bnx2x *bp = params->bp;
@@ -2779,11 +2781,11 @@ static void bnx2x_init_internal_phy(struct bnx2x_phy *phy, 
	}

}



static u8 bnx2x_init_serdes(struct bnx2x_phy *phy,

static int bnx2x_init_serdes(struct bnx2x_phy *phy,

			     struct link_params *params,

			     struct link_vars *vars)

{

	u8 rc;

	int rc;

	vars->phy_flags |= PHY_SGMII_FLAG;

	bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc);

	bnx2x_set_aer_mmd_serdes(params->bp, phy);
@@ -2796,11 +2798,11 @@ static u8 bnx2x_init_serdes(struct bnx2x_phy *phy, 
	return rc;

}



static u8 bnx2x_init_xgxs(struct bnx2x_phy *phy,

static int bnx2x_init_xgxs(struct bnx2x_phy *phy,

			   struct link_params *params,

			   struct link_vars *vars)

{

	u8 rc;

	int rc;

	vars->phy_flags = PHY_XGXS_FLAG;

	if ((phy->req_line_speed &&

	     ((phy->req_line_speed == SPEED_100) ||
@@ -2989,7 +2991,7 @@ static void bnx2x_link_int_ack(struct link_params *params, 
	}

}



static u8 bnx2x_format_ver(u32 num, u8 *str, u16 *len)

static int bnx2x_format_ver(u32 num, u8 *str, u16 *len)

{

	u8 *str_ptr = str;

	u32 mask = 0xf0000000;
@@ -3028,19 +3030,19 @@ static u8 bnx2x_format_ver(u32 num, u8 *str, u16 *len) 
}





static u8 bnx2x_null_format_ver(u32 spirom_ver, u8 *str, u16 *len)

static int bnx2x_null_format_ver(u32 spirom_ver, u8 *str, u16 *len)

{

	str[0] = '\0';

	(*len)--;

	return 0;

}



u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,

int bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,

				 u8 *version, u16 len)

{

	struct bnx2x *bp;

	u32 spirom_ver = 0;

	u8 status = 0;

	int status = 0;

	u8 *ver_p = version;

	u16 remain_len = len;

	if (version == NULL || params == NULL)
@@ -3124,12 +3126,13 @@ static void bnx2x_set_xgxs_loopback(struct bnx2x_phy *phy, 
	}

}



u8 bnx2x_set_led(struct link_params *params,

int bnx2x_set_led(struct link_params *params,

		  struct link_vars *vars, u8 mode, u32 speed)

{

	u8 port = params->port;

	u16 hw_led_mode = params->hw_led_mode;

	u8 rc = 0, phy_idx;

	int rc = 0;

	u8 phy_idx;

	u32 tmp;

	u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0;

	struct bnx2x *bp = params->bp;
@@ -3233,7 +3236,7 @@ u8 bnx2x_set_led(struct link_params *params, 
 * This function comes to reflect the actual link state read DIRECTLY from the

 * HW

 */

u8 bnx2x_test_link(struct link_params *params, struct link_vars *vars,

int bnx2x_test_link(struct link_params *params, struct link_vars *vars,

		    u8 is_serdes)

{

	struct bnx2x *bp = params->bp;
@@ -3284,10 +3287,10 @@ u8 bnx2x_test_link(struct link_params *params, struct link_vars *vars, 
	return -ESRCH;

}



static u8 bnx2x_link_initialize(struct link_params *params,

static int bnx2x_link_initialize(struct link_params *params,

				 struct link_vars *vars)

{

	u8 rc = 0;

	int rc = 0;

	u8 phy_index, non_ext_phy;

	struct bnx2x *bp = params->bp;

	/*
@@ -3380,7 +3383,7 @@ static void bnx2x_common_ext_link_reset(struct bnx2x_phy *phy, 
	DP(NETIF_MSG_LINK, "reset external PHY\n");

}



static u8 bnx2x_update_link_down(struct link_params *params,

static int bnx2x_update_link_down(struct link_params *params,

				  struct link_vars *vars)

{

	struct bnx2x *bp = params->bp;
@@ -3412,13 +3415,13 @@ static u8 bnx2x_update_link_down(struct link_params *params, 
	return 0;

}



static u8 bnx2x_update_link_up(struct link_params *params,

static int bnx2x_update_link_up(struct link_params *params,

				struct link_vars *vars,

				u8 link_10g)

{

	struct bnx2x *bp = params->bp;

	u8 port = params->port;

	u8 rc = 0;

	int rc = 0;



	vars->link_status |= LINK_STATUS_LINK_UP;
@@ -3472,13 +3475,14 @@ static u8 bnx2x_update_link_up(struct link_params *params, 
 *   external phy needs to be up, and at least one of the 2

 *   external phy link must be up.

 */

u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)

int bnx2x_link_update(struct link_params *params, struct link_vars *vars)

{

	struct bnx2x *bp = params->bp;

	struct link_vars phy_vars[MAX_PHYS];

	u8 port = params->port;

	u8 link_10g, phy_index;

	u8 ext_phy_link_up = 0, cur_link_up, rc = 0;

	u8 ext_phy_link_up = 0, cur_link_up;

	int rc = 0;

	u8 is_mi_int = 0;

	u16 ext_phy_line_speed = 0, prev_line_speed = vars->line_speed;

	u8 active_external_phy = INT_PHY;
@@ -3866,13 +3870,13 @@ static void bnx2x_8073_resolve_fc(struct bnx2x_phy *phy, 
			   pause_result);

	}

}

static u8 bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp,

static int bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp,

					     struct bnx2x_phy *phy,

					     u8 port)

{

	u32 count = 0;

	u16 fw_ver1, fw_msgout;

	u8 rc = 0;

	int rc = 0;



	/* Boot port from external ROM  */

	/* EDC grst */
@@ -3947,7 +3951,7 @@ static u8 bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp, 
/******************************************************************/

/*			BCM8073 PHY SECTION			  */

/******************************************************************/

static u8 bnx2x_8073_is_snr_needed(struct bnx2x *bp, struct bnx2x_phy *phy)

static int bnx2x_8073_is_snr_needed(struct bnx2x *bp, struct bnx2x_phy *phy)

{

	/* This is only required for 8073A1, version 102 only */

	u16 val;
@@ -3973,7 +3977,7 @@ static u8 bnx2x_8073_is_snr_needed(struct bnx2x *bp, struct bnx2x_phy *phy) 
	return 1;

}



static u8 bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy)

static int bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy)

{

	u16 val, cnt, cnt1 ;
@@ -4080,7 +4084,7 @@ static void bnx2x_8073_set_pause_cl37(struct link_params *params, 
	msleep(500);

}



static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy,

static int bnx2x_8073_config_init(struct bnx2x_phy *phy,

				  struct link_params *params,

				  struct link_vars *vars)

{
@@ -4388,7 +4392,7 @@ static void bnx2x_8073_link_reset(struct bnx2x_phy *phy, 
/******************************************************************/

/*			BCM8705 PHY SECTION			  */

/******************************************************************/

static u8 bnx2x_8705_config_init(struct bnx2x_phy *phy,

static int bnx2x_8705_config_init(struct bnx2x_phy *phy,

				  struct link_params *params,

				  struct link_vars *vars)

{
@@ -4521,7 +4525,7 @@ static void bnx2x_sfp_set_transmitter(struct link_params *params, 
	}

}



static u8 bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy,

static int bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy,

					     struct link_params *params,

					     u16 addr, u8 byte_cnt, u8 *o_buf)

{
@@ -4587,7 +4591,7 @@ static u8 bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy, 
	return -EINVAL;

}



static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy,

static int bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy,

					     struct link_params *params,

					     u16 addr, u8 byte_cnt, u8 *o_buf)

{
@@ -4674,11 +4678,11 @@ static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy, 
	return -EINVAL;

}



u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy,

int bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy,

				 struct link_params *params, u16 addr,

				 u8 byte_cnt, u8 *o_buf)

{

	u8 rc = -EINVAL;

	int rc = -EINVAL;

	switch (phy->type) {

	case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726:

		rc = bnx2x_8726_read_sfp_module_eeprom(phy, params, addr,
@@ -4693,7 +4697,7 @@ u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, 
	return rc;

}



static u8 bnx2x_get_edc_mode(struct bnx2x_phy *phy,

static int bnx2x_get_edc_mode(struct bnx2x_phy *phy,

			      struct link_params *params,

			      u16 *edc_mode)

{
@@ -4800,7 +4804,7 @@ static u8 bnx2x_get_edc_mode(struct bnx2x_phy *phy, 
 * This function read the relevant field from the module (SFP+), and verify it

 * is compliant with this board

 */

static u8 bnx2x_verify_sfp_module(struct bnx2x_phy *phy,

static int bnx2x_verify_sfp_module(struct bnx2x_phy *phy,

				   struct link_params *params)

{

	struct bnx2x *bp = params->bp;
@@ -4870,7 +4874,7 @@ static u8 bnx2x_verify_sfp_module(struct bnx2x_phy *phy, 
	return -EINVAL;

}



static u8 bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy,

static int bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy,

						 struct link_params *params)



{
@@ -4929,7 +4933,7 @@ static void bnx2x_8727_power_module(struct bnx2x *bp, 
			 val);

}



static u8 bnx2x_8726_set_limiting_mode(struct bnx2x *bp,

static int bnx2x_8726_set_limiting_mode(struct bnx2x *bp,

					struct bnx2x_phy *phy,

					u16 edc_mode)

{
@@ -4979,7 +4983,7 @@ static u8 bnx2x_8726_set_limiting_mode(struct bnx2x *bp, 
	return 0;

}



static u8 bnx2x_8727_set_limiting_mode(struct bnx2x *bp,

static int bnx2x_8727_set_limiting_mode(struct bnx2x *bp,

					struct bnx2x_phy *phy,

					u16 edc_mode)

{
@@ -5098,12 +5102,12 @@ static void bnx2x_set_limiting_mode(struct link_params *params, 
	}

}



static u8 bnx2x_sfp_module_detection(struct bnx2x_phy *phy,

int bnx2x_sfp_module_detection(struct bnx2x_phy *phy,

			       struct link_params *params)

{

	struct bnx2x *bp = params->bp;

	u16 edc_mode;

	u8 rc = 0;

	int rc = 0;



	u32 val = REG_RD(bp, params->shmem_base +

			     offsetof(struct shmem_region, dev_info.
@@ -5353,7 +5357,7 @@ static u8 bnx2x_8706_config_init(struct bnx2x_phy *phy, 
	return 0;

}



static u8 bnx2x_8706_read_status(struct bnx2x_phy *phy,

static int bnx2x_8706_read_status(struct bnx2x_phy *phy,

				  struct link_params *params,

				  struct link_vars *vars)

{
@@ -5430,7 +5434,7 @@ static u8 bnx2x_8726_read_status(struct bnx2x_phy *phy, 
}





static u8 bnx2x_8726_config_init(struct bnx2x_phy *phy,

static int bnx2x_8726_config_init(struct bnx2x_phy *phy,

				  struct link_params *params,

				  struct link_vars *vars)

{
@@ -5620,7 +5624,7 @@ static void bnx2x_8727_hw_reset(struct bnx2x_phy *phy, 
		       MISC_REGISTERS_GPIO_OUTPUT_LOW, port);

}



static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy,

static int bnx2x_8727_config_init(struct bnx2x_phy *phy,

				  struct link_params *params,

				  struct link_vars *vars)

{
@@ -6142,7 +6146,7 @@ static void bnx2x_848xx_set_led(struct bnx2x *bp, 
			 0xFFFB, 0xFFFD);

}



static u8 bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy,

static int bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy,

				       struct link_params *params,

				       struct link_vars *vars)

{
@@ -6270,7 +6274,7 @@ static u8 bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy, 
	return 0;

}



static u8 bnx2x_8481_config_init(struct bnx2x_phy *phy,

static int bnx2x_8481_config_init(struct bnx2x_phy *phy,

				  struct link_params *params,

				  struct link_vars *vars)

{
@@ -6287,7 +6291,7 @@ static u8 bnx2x_8481_config_init(struct bnx2x_phy *phy, 
	return bnx2x_848xx_cmn_config_init(phy, params, vars);

}



static u8 bnx2x_848x3_config_init(struct bnx2x_phy *phy,

static int bnx2x_848x3_config_init(struct bnx2x_phy *phy,

				   struct link_params *params,

				   struct link_vars *vars)

{
@@ -6296,7 +6300,7 @@ static u8 bnx2x_848x3_config_init(struct bnx2x_phy *phy, 
	u16 val, adj;

	u16 temp;

	u32 actual_phy_selection, cms_enable;

	u8 rc = 0;

	int rc = 0;



	/* This is just for MDIO_CTL_REG_84823_MEDIA register. */

	adj = 0;
@@ -6475,9 +6479,10 @@ static u8 bnx2x_848xx_read_status(struct bnx2x_phy *phy, 
	return link_up;

}



static u8 bnx2x_848xx_format_ver(u32 raw_ver, u8 *str, u16 *len)



static int bnx2x_848xx_format_ver(u32 raw_ver, u8 *str, u16 *len)

{

	u8 status = 0;

	int status = 0;

	u32 spirom_ver;

	spirom_ver = ((raw_ver & 0xF80) >> 7) << 16 | (raw_ver & 0x7F);

	status = bnx2x_format_ver(spirom_ver, str, len);
@@ -6718,7 +6723,7 @@ static void bnx2x_7101_config_loopback(struct bnx2x_phy *phy, 
			 MDIO_XS_DEVAD, MDIO_XS_SFX7101_XGXS_TEST1, 0x100);

}



static u8 bnx2x_7101_config_init(struct bnx2x_phy *phy,

static int bnx2x_7101_config_init(struct bnx2x_phy *phy,

				  struct link_params *params,

				  struct link_vars *vars)

{
@@ -6793,8 +6798,7 @@ static u8 bnx2x_7101_read_status(struct bnx2x_phy *phy, 
	return link_up;

}





static u8 bnx2x_7101_format_ver(u32 spirom_ver, u8 *str, u16 *len)

static int bnx2x_7101_format_ver(u32 spirom_ver, u8 *str, u16 *len)

{

	if (*len < 5)

		return -EINVAL;
@@ -7331,7 +7335,7 @@ static u32 bnx2x_get_ext_phy_config(struct bnx2x *bp, u32 shmem_base, 


	return ext_phy_config;

}

static u8 bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,

static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,

				  struct bnx2x_phy *phy)

{

	u32 phy_addr;
@@ -7374,7 +7378,7 @@ static u8 bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port, 
	return 0;

}



static u8 bnx2x_populate_ext_phy(struct bnx2x *bp,

static int bnx2x_populate_ext_phy(struct bnx2x *bp,

				  u8 phy_index,

				  u32 shmem_base,

				  u32 shmem2_base,
@@ -7483,10 +7487,10 @@ static u8 bnx2x_populate_ext_phy(struct bnx2x *bp, 
	return 0;

}



static u8 bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base,

static int bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base,

			      u32 shmem2_base, u8 port, struct bnx2x_phy *phy)

{

	u8 status = 0;

	int status = 0;

	phy->type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN;

	if (phy_index == INT_PHY)

		return bnx2x_populate_int_phy(bp, shmem_base, port, phy);
@@ -7600,7 +7604,7 @@ u32 bnx2x_phy_selection(struct link_params *params) 
}





u8 bnx2x_phy_probe(struct link_params *params)

int bnx2x_phy_probe(struct link_params *params)

{

	u8 phy_index, actual_phy_idx, link_cfg_idx;

	u32 phy_config_swapped, sync_offset, media_types;
@@ -7704,7 +7708,7 @@ static void set_phy_vars(struct link_params *params) 
	}

}



u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)

int bnx2x_phy_init(struct link_params *params, struct link_vars *vars)

{

	struct bnx2x *bp = params->bp;

	DP(NETIF_MSG_LINK, "Phy Initialization started\n");
@@ -7827,7 +7831,8 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars) 
	}

	return 0;

}

u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars,



int bnx2x_link_reset(struct link_params *params, struct link_vars *vars,

		     u8 reset_ext_phy)

{

	struct bnx2x *bp = params->bp;
@@ -7900,7 +7905,7 @@ u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars, 
/****************************************************************************/

/*				Common function				    */

/****************************************************************************/

static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp,

static int bnx2x_8073_common_init_phy(struct bnx2x *bp,

				      u32 shmem_base_path[],

				      u32 shmem2_base_path[], u8 phy_index,

				      u32 chip_id)
@@ -8026,7 +8031,7 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, 
	}

	return 0;

}

static u8 bnx2x_8726_common_init_phy(struct bnx2x *bp,

static int bnx2x_8726_common_init_phy(struct bnx2x *bp,

				      u32 shmem_base_path[],

				      u32 shmem2_base_path[], u8 phy_index,

				      u32 chip_id)
@@ -8120,7 +8125,8 @@ static void bnx2x_get_ext_phy_reset_gpio(struct bnx2x *bp, u32 shmem_base, 
		break;

	}

}

static u8 bnx2x_8727_common_init_phy(struct bnx2x *bp,



static int bnx2x_8727_common_init_phy(struct bnx2x *bp,

				      u32 shmem_base_path[],

				      u32 shmem2_base_path[], u8 phy_index,

				      u32 chip_id)
@@ -8216,11 +8222,11 @@ static u8 bnx2x_8727_common_init_phy(struct bnx2x *bp, 
	return 0;

}



static u8 bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[],

static int bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[],

				     u32 shmem2_base_path[], u8 phy_index,

				     u32 ext_phy_type, u32 chip_id)

{

	u8 rc = 0;

	int rc = 0;



	switch (ext_phy_type) {

	case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073:
@@ -8262,10 +8268,10 @@ static u8 bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[], 
	return rc;

}



u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[],

int bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[],

			  u32 shmem2_base_path[], u32 chip_id)

{

	u8 rc = 0;

	int rc = 0;

	u32 phy_ver;

	u8 phy_index;

	u32 ext_phy_type, ext_phy_config;

drivers/net/bnx2x/bnx2x_link.h

+23 −21
Original line number Diff line number Diff line
@@ -281,40 +281,41 @@ struct link_vars { 
/***********************************************************/

/*                         Functions                       */

/***********************************************************/

u8 bnx2x_phy_init(struct link_params *input, struct link_vars *output);

int bnx2x_phy_init(struct link_params *params, struct link_vars *vars);



/* Reset the link. Should be called when driver or interface goes down

   Before calling phy firmware upgrade, the reset_ext_phy should be set

   to 0 */

u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars,

int bnx2x_link_reset(struct link_params *params, struct link_vars *vars,

		     u8 reset_ext_phy);



/* bnx2x_link_update should be called upon link interrupt */

u8 bnx2x_link_update(struct link_params *input, struct link_vars *output);

int bnx2x_link_update(struct link_params *params, struct link_vars *vars);



/* use the following phy functions to read/write from external_phy

  In order to use it to read/write internal phy registers, use

  DEFAULT_PHY_DEV_ADDR as devad, and (_bank + (_addr & 0xf)) as

  the register */

u8 bnx2x_phy_read(struct link_params *params, u8 phy_addr,

int bnx2x_phy_read(struct link_params *params, u8 phy_addr,

		   u8 devad, u16 reg, u16 *ret_val);



u8 bnx2x_phy_write(struct link_params *params, u8 phy_addr,

int bnx2x_phy_write(struct link_params *params, u8 phy_addr,

		    u8 devad, u16 reg, u16 val);



/* Reads the link_status from the shmem,

   and update the link vars accordingly */

void bnx2x_link_status_update(struct link_params *input,

			    struct link_vars *output);

/* returns string representing the fw_version of the external phy */

u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,

int bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,

				 u8 *version, u16 len);



/* Set/Unset the led

   Basically, the CLC takes care of the led for the link, but in case one needs

   to set/unset the led unnaturally, set the "mode" to LED_MODE_OPER to

   blink the led, and LED_MODE_OFF to set the led off.*/

u8 bnx2x_set_led(struct link_params *params, struct link_vars *vars,

		 u8 mode, u32 speed);

int bnx2x_set_led(struct link_params *params,

		  struct link_vars *vars, u8 mode, u32 speed);

#define LED_MODE_OFF			0

#define LED_MODE_ON			1

#define LED_MODE_OPER			2
@@ -326,11 +327,11 @@ void bnx2x_handle_module_detect_int(struct link_params *params); 


/* Get the actual link status. In case it returns 0, link is up,

	otherwise link is down*/

u8 bnx2x_test_link(struct link_params *input, struct link_vars *vars,

int bnx2x_test_link(struct link_params *params, struct link_vars *vars,

		    u8 is_serdes);



/* One-time initialization for external phy after power up */

u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[],

int bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[],

			  u32 shmem2_base_path[], u32 chip_id);



/* Reset the external PHY using GPIO */
@@ -340,7 +341,7 @@ void bnx2x_ext_phy_hw_reset(struct bnx2x *bp, u8 port); 
void bnx2x_sfx7101_sp_sw_reset(struct bnx2x *bp, struct bnx2x_phy *phy);



/* Read "byte_cnt" bytes from address "addr" from the SFP+ EEPROM */

u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy,

int bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy,

				 struct link_params *params, u16 addr,

				 u8 byte_cnt, u8 *o_buf);
@@ -354,7 +355,8 @@ u8 bnx2x_hw_lock_required(struct bnx2x *bp, u32 shmem_base, 
u32 bnx2x_phy_selection(struct link_params *params);



/* Probe the phys on board, and populate them in "params" */

u8 bnx2x_phy_probe(struct link_params *params);

int bnx2x_phy_probe(struct link_params *params);



/* Checks if fan failure detection is required on one of the phys on board */

u8 bnx2x_fan_failure_det_req(struct bnx2x *bp, u32 shmem_base,

			     u32 shmem2_base, u8 port);
@@ -392,7 +394,7 @@ void bnx2x_ets_bw_limit(const struct link_params *params, const u32 cos0_bw, 
			const u32 cos1_bw);



/* Used to configure the ETS to strict */

u8 bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos);

int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos);



/* Read pfc statistic*/

void bnx2x_pfc_statistic(struct link_params *params, struct link_vars *vars,