Unverified Commit fcebca39 authored by Ramuthevar Vadivel Murugan's avatar Ramuthevar Vadivel Murugan Committed by Mark Brown
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dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi 



Add new vendor specific compatible string to check Intel's Lightning
Mountain(LGM) QSPI features enablement in cadence-quadspi driver.

Signed-off-by: default avatarRamuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201124041840.31066-6-vadivel.muruganx.ramuthevar@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent eb4aadc3

Documentation/devicetree/bindings/spi/cadence-quadspi.txt

+1 −0
Original line number Original line Diff line number Diff line
@@ -5,6 +5,7 @@ Required properties: 
	Generic default - "cdns,qspi-nor".

	Generic default - "cdns,qspi-nor".

	For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".

	For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".

	For TI AM654 SoC  - "ti,am654-ospi", "cdns,qspi-nor".

	For TI AM654 SoC  - "ti,am654-ospi", "cdns,qspi-nor".

	For Intel LGM SoC - "intel,lgm-qspi", "cdns,qspi-nor".

- reg : Contains two entries, each of which is a tuple consisting of a

- reg : Contains two entries, each of which is a tuple consisting of a

	physical address and length. The first entry is the address and

	physical address and length. The first entry is the address and

	length of the controller register set. The second entry is the

	length of the controller register set. The second entry is the