Loading drivers/mtd/nand/Kconfig +12 −0 Original line number Diff line number Diff line Loading @@ -109,6 +109,18 @@ config MTD_NAND_BF5XX_HWECC Enable the use of the BF5XX's internal ECC generator when using NAND. config MTD_NAND_BF5XX_BOOTROM_ECC bool "Use Blackfin BootROM ECC Layout" default n depends on MTD_NAND_BF5XX_HWECC help If you wish to modify NAND pages and allow the Blackfin on-chip BootROM to boot from them, say Y here. This is only necessary if you are booting U-Boot out of NAND and you wish to update U-Boot from Linux' userspace. Otherwise, you should say N here. If unsure, say N. config MTD_NAND_RTC_FROM4 tristate "Renesas Flash ROM 4-slot interface board (FROM_BOARD4)" depends on SH_SOLUTION_ENGINE Loading drivers/mtd/nand/bf5xx_nand.c +40 −0 Original line number Diff line number Diff line Loading @@ -91,6 +91,41 @@ static const unsigned short bfin_nfc_pin_req[] = P_NAND_ALE, 0}; #ifdef CONFIG_MTD_NAND_BF5XX_BOOTROM_ECC static uint8_t bbt_pattern[] = { 0xff }; static struct nand_bbt_descr bootrom_bbt = { .options = 0, .offs = 63, .len = 1, .pattern = bbt_pattern, }; static struct nand_ecclayout bootrom_ecclayout = { .eccbytes = 24, .eccpos = { 0x8 * 0, 0x8 * 0 + 1, 0x8 * 0 + 2, 0x8 * 1, 0x8 * 1 + 1, 0x8 * 1 + 2, 0x8 * 2, 0x8 * 2 + 1, 0x8 * 2 + 2, 0x8 * 3, 0x8 * 3 + 1, 0x8 * 3 + 2, 0x8 * 4, 0x8 * 4 + 1, 0x8 * 4 + 2, 0x8 * 5, 0x8 * 5 + 1, 0x8 * 5 + 2, 0x8 * 6, 0x8 * 6 + 1, 0x8 * 6 + 2, 0x8 * 7, 0x8 * 7 + 1, 0x8 * 7 + 2 }, .oobfree = { { 0x8 * 0 + 3, 5 }, { 0x8 * 1 + 3, 5 }, { 0x8 * 2 + 3, 5 }, { 0x8 * 3 + 3, 5 }, { 0x8 * 4 + 3, 5 }, { 0x8 * 5 + 3, 5 }, { 0x8 * 6 + 3, 5 }, { 0x8 * 7 + 3, 5 }, } }; #endif /* * Data structures for bf5xx nand flash controller driver */ Loading Loading @@ -712,6 +747,11 @@ static int bf5xx_nand_probe(struct platform_device *pdev) /* setup hardware ECC data struct */ if (hardware_ecc) { #ifdef CONFIG_MTD_NAND_BF5XX_BOOTROM_ECC chip->badblock_pattern = &bootrom_bbt; chip->ecc.layout = &bootrom_ecclayout; #endif if (plat->page_size == NFC_PG_SIZE_256) { chip->ecc.bytes = 3; chip->ecc.size = 256; Loading Loading
drivers/mtd/nand/Kconfig +12 −0 Original line number Diff line number Diff line Loading @@ -109,6 +109,18 @@ config MTD_NAND_BF5XX_HWECC Enable the use of the BF5XX's internal ECC generator when using NAND. config MTD_NAND_BF5XX_BOOTROM_ECC bool "Use Blackfin BootROM ECC Layout" default n depends on MTD_NAND_BF5XX_HWECC help If you wish to modify NAND pages and allow the Blackfin on-chip BootROM to boot from them, say Y here. This is only necessary if you are booting U-Boot out of NAND and you wish to update U-Boot from Linux' userspace. Otherwise, you should say N here. If unsure, say N. config MTD_NAND_RTC_FROM4 tristate "Renesas Flash ROM 4-slot interface board (FROM_BOARD4)" depends on SH_SOLUTION_ENGINE Loading
drivers/mtd/nand/bf5xx_nand.c +40 −0 Original line number Diff line number Diff line Loading @@ -91,6 +91,41 @@ static const unsigned short bfin_nfc_pin_req[] = P_NAND_ALE, 0}; #ifdef CONFIG_MTD_NAND_BF5XX_BOOTROM_ECC static uint8_t bbt_pattern[] = { 0xff }; static struct nand_bbt_descr bootrom_bbt = { .options = 0, .offs = 63, .len = 1, .pattern = bbt_pattern, }; static struct nand_ecclayout bootrom_ecclayout = { .eccbytes = 24, .eccpos = { 0x8 * 0, 0x8 * 0 + 1, 0x8 * 0 + 2, 0x8 * 1, 0x8 * 1 + 1, 0x8 * 1 + 2, 0x8 * 2, 0x8 * 2 + 1, 0x8 * 2 + 2, 0x8 * 3, 0x8 * 3 + 1, 0x8 * 3 + 2, 0x8 * 4, 0x8 * 4 + 1, 0x8 * 4 + 2, 0x8 * 5, 0x8 * 5 + 1, 0x8 * 5 + 2, 0x8 * 6, 0x8 * 6 + 1, 0x8 * 6 + 2, 0x8 * 7, 0x8 * 7 + 1, 0x8 * 7 + 2 }, .oobfree = { { 0x8 * 0 + 3, 5 }, { 0x8 * 1 + 3, 5 }, { 0x8 * 2 + 3, 5 }, { 0x8 * 3 + 3, 5 }, { 0x8 * 4 + 3, 5 }, { 0x8 * 5 + 3, 5 }, { 0x8 * 6 + 3, 5 }, { 0x8 * 7 + 3, 5 }, } }; #endif /* * Data structures for bf5xx nand flash controller driver */ Loading Loading @@ -712,6 +747,11 @@ static int bf5xx_nand_probe(struct platform_device *pdev) /* setup hardware ECC data struct */ if (hardware_ecc) { #ifdef CONFIG_MTD_NAND_BF5XX_BOOTROM_ECC chip->badblock_pattern = &bootrom_bbt; chip->ecc.layout = &bootrom_ecclayout; #endif if (plat->page_size == NFC_PG_SIZE_256) { chip->ecc.bytes = 3; chip->ecc.size = 256; Loading