Commit fcad15d5 authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Felix Fietkau
Browse files

mt76: mt7921: introduce mt7921_wpdma_reset utility routine



Introduce mt7921_wpdma_reset routine to reset wpdma during chip reset
or driver_own request.

Signed-off-by: default avatarSean Wang <sean.wang@mediatek.com>
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent 0a1059d0
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+43 −1
Original line number Diff line number Diff line
@@ -229,7 +229,7 @@ static int mt7921_dmashdl_disabled(struct mt7921_dev *dev)
	return 0;
}

int mt7921_dma_reset(struct mt7921_dev *dev, bool force)
static int mt7921_dma_reset(struct mt7921_dev *dev, bool force)
{
	int i;

@@ -300,6 +300,48 @@ int mt7921_dma_reset(struct mt7921_dev *dev, bool force)
	return 0;
}

int mt7921_wfsys_reset(struct mt7921_dev *dev)
{
	mt76_set(dev, 0x70002600, BIT(0));
	msleep(200);
	mt76_clear(dev, 0x70002600, BIT(0));

	if (!__mt76_poll_msec(&dev->mt76, MT_WFSYS_SW_RST_B,
			      WFSYS_SW_INIT_DONE, WFSYS_SW_INIT_DONE, 500))
		return -ETIMEDOUT;

	return 0;
}

int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force)
{
	int i, err;

	/* clean up hw queues */
	for (i = 0; i < ARRAY_SIZE(dev->mt76.phy.q_tx); i++)
		mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true);

	for (i = 0; i < ARRAY_SIZE(dev->mt76.q_mcu); i++)
		mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true);

	mt76_for_each_q_rx(&dev->mt76, i)
		mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]);

	if (force) {
		err = mt7921_wfsys_reset(dev);
		if (err)
			return err;
	}
	err = mt7921_dma_reset(dev, force);
	if (err)
		return err;

	mt76_for_each_q_rx(&dev->mt76, i)
		mt76_queue_rx_reset(dev, i);

	return 0;
}

int mt7921_dma_init(struct mt7921_dev *dev)
{
	/* Increase buffer size to receive large VHT/HE MPDUs */
+3 −26
Original line number Diff line number Diff line
@@ -1204,16 +1204,6 @@ void mt7921_update_channel(struct mt76_dev *mdev)
	mt76_connac_power_save_sched(&dev->mphy, &dev->pm);
}

int mt7921_wfsys_reset(struct mt7921_dev *dev)
{
	mt76_set(dev, 0x70002600, BIT(0));
	msleep(200);
	mt76_clear(dev, 0x70002600, BIT(0));

	return __mt76_poll_msec(&dev->mt76, MT_WFSYS_SW_RST_B,
				WFSYS_SW_INIT_DONE, WFSYS_SW_INIT_DONE, 500);
}

void mt7921_tx_token_put(struct mt7921_dev *dev)
{
	struct mt76_txwi_cache *txwi;
@@ -1273,21 +1263,11 @@ mt7921_mac_reset(struct mt7921_dev *dev)
	mt7921_tx_token_put(dev);
	idr_init(&dev->token);

	/* clean up hw queues */
	for (i = 0; i < ARRAY_SIZE(dev->mt76.phy.q_tx); i++)
		mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], true);

	for (i = 0; i < ARRAY_SIZE(dev->mt76.q_mcu); i++)
		mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true);

	mt76_for_each_q_rx(&dev->mt76, i)
		mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]);

	mt7921_wfsys_reset(dev);
	mt7921_dma_reset(dev, true);
	err = mt7921_wpdma_reset(dev, true);
	if (err)
		return err;

	mt76_for_each_q_rx(&dev->mt76, i) {
		mt76_queue_rx_reset(dev, i);
		napi_enable(&dev->mt76.napi[i]);
		napi_schedule(&dev->mt76.napi[i]);
	}
@@ -1301,9 +1281,6 @@ mt7921_mac_reset(struct mt7921_dev *dev)

	mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);
	mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);
	mt7921_irq_enable(dev,
			  MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
			  MT_INT_MCU_CMD);

	err = mt7921_run_firmware(dev);
	if (err)
+1 −1
Original line number Diff line number Diff line
@@ -253,7 +253,7 @@ int mt7921_eeprom_get_target_power(struct mt7921_dev *dev,
				   u8 chain_idx);
void mt7921_eeprom_init_sku(struct mt7921_dev *dev);
int mt7921_dma_init(struct mt7921_dev *dev);
int mt7921_dma_reset(struct mt7921_dev *dev, bool force);
int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force);
void mt7921_dma_cleanup(struct mt7921_dev *dev);
int mt7921_run_firmware(struct mt7921_dev *dev);
int mt7921_mcu_init(struct mt7921_dev *dev);