Commit fcacdfbe authored by Thomas Gleixner's avatar Thomas Gleixner
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PCI/MSI: Provide a new set of mask and unmask functions 



The existing mask/unmask functions are convoluted and generate suboptimal
assembly code.

Provide a new set of functions which will be used in later patches to
replace the exisiting ones.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Tested-by: default avatarMarc Zyngier <maz@kernel.org>
Reviewed-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/875ywetozb.ffs@tglx
parent 7327cefe

drivers/pci/msi.c

+72 −0
Original line number Diff line number Diff line
@@ -211,6 +211,78 @@ static inline __attribute_const__ u32 msi_multi_mask(struct msi_desc *desc) 
	return (1 << (1 << desc->msi_attrib.multi_cap)) - 1;

}



static noinline void pci_msi_update_mask(struct msi_desc *desc, u32 clear, u32 set)

{

	raw_spinlock_t *lock = &desc->dev->msi_lock;

	unsigned long flags;



	raw_spin_lock_irqsave(lock, flags);

	desc->msi_mask &= ~clear;

	desc->msi_mask |= set;

	pci_write_config_dword(msi_desc_to_pci_dev(desc), desc->mask_pos,

			       desc->msi_mask);

	raw_spin_unlock_irqrestore(lock, flags);

}



static inline void pci_msi_mask(struct msi_desc *desc, u32 mask)

{

	pci_msi_update_mask(desc, 0, mask);

}



static inline void pci_msi_unmask(struct msi_desc *desc, u32 mask)

{

	pci_msi_update_mask(desc, mask, 0);

}



/*

 * This internal function does not flush PCI writes to the device.  All

 * users must ensure that they read from the device before either assuming

 * that the device state is up to date, or returning out of this file.

 * It does not affect the msi_desc::msix_ctrl cache either. Use with care!

 */

static void pci_msix_write_vector_ctrl(struct msi_desc *desc, u32 ctrl)

{

	void __iomem *desc_addr = pci_msix_desc_addr(desc);



	writel(ctrl, desc_addr + PCI_MSIX_ENTRY_VECTOR_CTRL);

}



static inline void pci_msix_mask(struct msi_desc *desc)

{

	desc->msix_ctrl |= PCI_MSIX_ENTRY_CTRL_MASKBIT;

	pci_msix_write_vector_ctrl(desc, desc->msix_ctrl);

	/* Flush write to device */

	readl(desc->mask_base);

}



static inline void pci_msix_unmask(struct msi_desc *desc)

{

	desc->msix_ctrl &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;

	pci_msix_write_vector_ctrl(desc, desc->msix_ctrl);

}



static void __pci_msi_mask_desc(struct msi_desc *desc, u32 mask)

{

	if (pci_msi_ignore_mask || desc->msi_attrib.is_virtual)

		return;



	if (desc->msi_attrib.is_msix)

		pci_msix_mask(desc);

	else if (desc->msi_attrib.maskbit)

		pci_msi_mask(desc, mask);

}



static void __pci_msi_unmask_desc(struct msi_desc *desc, u32 mask)

{

	if (pci_msi_ignore_mask || desc->msi_attrib.is_virtual)

		return;



	if (desc->msi_attrib.is_msix)

		pci_msix_unmask(desc);

	else if (desc->msi_attrib.maskbit)

		pci_msi_unmask(desc, mask);

}



/**

 * pci_msi_mask_irq - Generic IRQ chip callback to mask PCI/MSI interrupts

 * @data:	pointer to irqdata associated to that interrupt