Commit fca39258 authored by Robert Marko's avatar Robert Marko Committed by Bjorn Andersson
Browse files

clk: qcom: gcc-ipq4019: move pcnoc clocks up 



Move pcnoc clocks up just after PLL-s to be able to use their
HW fields.

Signed-off-by: default avatarRobert Marko <robert.marko@sartura.hr>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230214162325.312057-6-robert.marko@sartura.hr
parent 96797995

drivers/clk/qcom/gcc-ipq4019.c

+37 −37
Original line number Diff line number Diff line
@@ -499,6 +499,43 @@ static struct clk_fepll gcc_fepllwcss5g_clk = { 
	.pll_vco = &gcc_fepll_vco,

};



static const struct freq_tbl ftbl_gcc_pcnoc_ahb_clk[] = {

	F(48000000,  P_XO,	 1, 0, 0),

	F(100000000, P_FEPLL200, 2, 0, 0),

	{ }

};



static struct clk_rcg2 gcc_pcnoc_ahb_clk_src = {

	.cmd_rcgr = 0x21024,

	.hid_width = 5,

	.parent_map = gcc_xo_200_500_map,

	.freq_tbl = ftbl_gcc_pcnoc_ahb_clk,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "gcc_pcnoc_ahb_clk_src",

		.parent_names = gcc_xo_200_500,

		.num_parents = 3,

		.ops = &clk_rcg2_ops,

	},

};



static struct clk_branch pcnoc_clk_src = {

	.halt_reg = 0x21030,

	.clkr = {

		.enable_reg = 0x21030,

		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "pcnoc_clk_src",

			.parent_names = (const char *[]){

				"gcc_pcnoc_ahb_clk_src",

			},

			.num_parents = 1,

			.ops = &clk_branch2_ops,

			.flags = CLK_SET_RATE_PARENT |

				CLK_IS_CRITICAL,

		},

	},

};



static const struct freq_tbl ftbl_gcc_audio_pwm_clk[] = {

	F(48000000, P_XO, 1, 0, 0),

	F(200000000, P_FEPLL200, 1, 0, 0),
@@ -1541,43 +1578,6 @@ static struct clk_branch gcc_wcss5g_rtc_clk = { 
	},

};



static const struct freq_tbl ftbl_gcc_pcnoc_ahb_clk[] = {

	F(48000000,  P_XO,	 1, 0, 0),

	F(100000000, P_FEPLL200, 2, 0, 0),

	{ }

};



static struct clk_rcg2 gcc_pcnoc_ahb_clk_src = {

	.cmd_rcgr = 0x21024,

	.hid_width = 5,

	.parent_map = gcc_xo_200_500_map,

	.freq_tbl = ftbl_gcc_pcnoc_ahb_clk,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "gcc_pcnoc_ahb_clk_src",

		.parent_names = gcc_xo_200_500,

		.num_parents = 3,

		.ops = &clk_rcg2_ops,

	},

};



static struct clk_branch pcnoc_clk_src = {

	.halt_reg = 0x21030,

	.clkr = {

		.enable_reg = 0x21030,

		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "pcnoc_clk_src",

			.parent_names = (const char *[]){

				"gcc_pcnoc_ahb_clk_src",

			},

			.num_parents = 1,

			.ops = &clk_branch2_ops,

			.flags = CLK_SET_RATE_PARENT |

				CLK_IS_CRITICAL,

		},

	},

};



static struct clk_regmap *gcc_ipq4019_clocks[] = {

	[AUDIO_CLK_SRC] = &audio_clk_src.clkr,

	[BLSP1_QUP1_I2C_APPS_CLK_SRC] = &blsp1_qup1_i2c_apps_clk_src.clkr,