Commit fc4d4008 authored by Bryan O'Donoghue's avatar Bryan O'Donoghue Committed by Kalle Valo
Browse files

wcn36xx: Encode PHY mode for 80MHz channel in hw_value 



This commit encodes the 802.11ac PHY mode for a given channel in the upper
bits of the hw_value field. This allows for a neat read-out and application
of the relevant PHY setting.

Signed-off-by: default avatarBryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200910150708.2179043-5-bryan.odonoghue@linaro.org
parent 235b9ae0

drivers/net/wireless/ath/wcn36xx/main.c

+25 −25
Original line number Diff line number Diff line
@@ -39,10 +39,10 @@ MODULE_PARM_DESC(debug_mask, "Debugging mask"); 
	.max_power = 25, \

}



#define CHAN5G(_freq, _idx) { \

#define CHAN5G(_freq, _idx, _phy_val) { \

	.band = NL80211_BAND_5GHZ, \

	.center_freq = (_freq), \

	.hw_value = (_idx), \

	.hw_value = (_phy_val) << HW_VALUE_PHY_SHIFT | HW_VALUE_CHANNEL(_idx), \

	.max_power = 25, \

}
@@ -67,29 +67,29 @@ static struct ieee80211_channel wcn_2ghz_channels[] = { 
};



static struct ieee80211_channel wcn_5ghz_channels[] = {

	CHAN5G(5180, 36),

	CHAN5G(5200, 40),

	CHAN5G(5220, 44),

	CHAN5G(5240, 48),

	CHAN5G(5260, 52),

	CHAN5G(5280, 56),

	CHAN5G(5300, 60),

	CHAN5G(5320, 64),

	CHAN5G(5500, 100),

	CHAN5G(5520, 104),

	CHAN5G(5540, 108),

	CHAN5G(5560, 112),

	CHAN5G(5580, 116),

	CHAN5G(5600, 120),

	CHAN5G(5620, 124),

	CHAN5G(5640, 128),

	CHAN5G(5660, 132),

	CHAN5G(5700, 140),

	CHAN5G(5745, 149),

	CHAN5G(5765, 153),

	CHAN5G(5785, 157),

	CHAN5G(5805, 161),

	CHAN5G(5825, 165)

	CHAN5G(5180, 36, PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_LOW),

	CHAN5G(5200, 40, PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_LOW),

	CHAN5G(5220, 44, PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_HIGH),

	CHAN5G(5240, 48, PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_HIGH),

	CHAN5G(5260, 52, PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_LOW),

	CHAN5G(5280, 56, PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_LOW),

	CHAN5G(5300, 60, PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_HIGH),

	CHAN5G(5320, 64, PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_HIGH),

	CHAN5G(5500, 100, PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_LOW),

	CHAN5G(5520, 104, PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_LOW),

	CHAN5G(5540, 108, PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_HIGH),

	CHAN5G(5560, 112, PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_HIGH),

	CHAN5G(5580, 116, PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_LOW),

	CHAN5G(5600, 120, PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_LOW),

	CHAN5G(5620, 124, PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_HIGH),

	CHAN5G(5640, 128, PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_HIGH),

	CHAN5G(5660, 132, PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_LOW),

	CHAN5G(5700, 140, PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_HIGH),

	CHAN5G(5745, 149, PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_LOW),

	CHAN5G(5765, 153, PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_LOW),

	CHAN5G(5785, 157, PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_HIGH),

	CHAN5G(5805, 161, PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_HIGH),

	CHAN5G(5825, 165, 0)

};



#define RATE(_bitrate, _hw_rate, _flags) { \