Commit fc0ff3e7 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson
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arm64: dts: qcom: sm8350: fixup SDHCI interconnect arguments 



After switching interconnects to 2 cells, the SDHCI interconnects need
to get one more argument.

Fixes: 4f287e31 ("arm64: dts: qcom: sm8350: Use 2 interconnect cells")
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230119105434.51635-1-krzysztof.kozlowski@linaro.org
parent 0daef104

arch/arm64/boot/dts/qcom/sm8350.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -2547,8 +2547,8 @@ 
				 <&rpmhcc RPMH_CXO_CLK>;

			clock-names = "iface", "core", "xo";

			resets = <&gcc GCC_SDCC2_BCR>;

			interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,

					<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>;

			interconnects = <&aggre2_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,

					<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;

			interconnect-names = "sdhc-ddr","cpu-sdhc";

			iommus = <&apps_smmu 0x4a0 0x0>;

			power-domains = <&rpmhpd SM8350_CX>;