Unverified Commit fc041428 authored by Maxime Ripard's avatar Maxime Ripard
Browse files

drm/vc4: Make sure we don't end up with a core clock too high 



Following the clock rate range improvements to the clock framework,
trying to set a disjoint range on a clock will now result in an error.

Thus, we can't set a minimum rate higher than the maximum reported by
the firmware, or clk_set_min_rate() will fail.

Thus we need to clamp the rate we are about to ask for to the maximum
rate possible on that clock.

Reviewed-by: default avatarDave Stevenson <dave.stevenson@raspberrypi.com>
Link: https://lore.kernel.org/r/20220815-rpi-fix-4k-60-v5-7-fe9e7ac8b111@cerno.tech


Signed-off-by: default avatarMaxime Ripard <maxime@cerno.tech>
parent f09e172d

drivers/gpu/drm/vc4/vc4_kms.c

+8 −5
Original line number Diff line number Diff line
@@ -396,8 +396,8 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state) 
	if (vc4->is_vc5) {

		unsigned long state_rate = max(old_hvs_state->core_clock_rate,

					       new_hvs_state->core_clock_rate);

		unsigned long core_rate = max_t(unsigned long,

						500000000, state_rate);

		unsigned long core_rate = clamp_t(unsigned long, state_rate,

						  500000000, hvs->max_core_rate);



		drm_dbg(dev, "Raising the core clock at %lu Hz\n", core_rate);
@@ -431,14 +431,17 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state) 
	drm_atomic_helper_cleanup_planes(dev, state);



	if (vc4->is_vc5) {

		drm_dbg(dev, "Running the core clock at %lu Hz\n",

		unsigned long core_rate = min_t(unsigned long,

						hvs->max_core_rate,

						new_hvs_state->core_clock_rate);



		drm_dbg(dev, "Running the core clock at %lu Hz\n", core_rate);



		/*

		 * Request a clock rate based on the current HVS

		 * requirements.

		 */

		WARN_ON(clk_set_min_rate(hvs->core_clk, new_hvs_state->core_clock_rate));

		WARN_ON(clk_set_min_rate(hvs->core_clk, core_rate));



		drm_dbg(dev, "Core clock actual rate: %lu Hz\n",

			clk_get_rate(hvs->core_clk));