Commit fbcde5bb authored by Lu Baolu's avatar Lu Baolu Committed by Joerg Roedel
Browse files

iommu/vt-d: Move PRI handling to IOPF feature path 



PRI is only used for IOPF. With this move, the PCI/PRI feature could be
controlled by the device driver through iommu_dev_enable/disable_feature()
interfaces.

Reviewed-by: default avatarJacob Pan <jacob.jun.pan@linux.intel.com>
Reviewed-by: default avatarKevin Tian <kevin.tian@intel.com>
Signed-off-by: default avatarLu Baolu <baolu.lu@linux.intel.com>
Link: https://lore.kernel.org/r/20230324120234.313643-6-baolu.lu@linux.intel.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 5ae40080

drivers/iommu/intel/iommu.c

+41 −12
Original line number Diff line number Diff line
@@ -1415,11 +1415,6 @@ static void iommu_enable_pci_caps(struct device_domain_info *info) 
	if (info->pasid_supported && !pci_enable_pasid(pdev, info->pasid_supported & ~1))

		info->pasid_enabled = 1;



	if (info->pri_supported &&

	    (info->pasid_enabled ? pci_prg_resp_pasid_required(pdev) : 1)  &&

	    !pci_reset_pri(pdev) && !pci_enable_pri(pdev, PRQ_DEPTH))

		info->pri_enabled = 1;



	if (info->ats_supported && pci_ats_page_aligned(pdev) &&

	    !pci_enable_ats(pdev, VTD_PAGE_SHIFT)) {

		info->ats_enabled = 1;
@@ -1442,11 +1437,6 @@ static void iommu_disable_pci_caps(struct device_domain_info *info) 
		domain_update_iotlb(info->domain);

	}



	if (info->pri_enabled) {

		pci_disable_pri(pdev);

		info->pri_enabled = 0;

	}



	if (info->pasid_enabled) {

		pci_disable_pasid(pdev);

		info->pasid_enabled = 0;
@@ -4667,22 +4657,47 @@ static int intel_iommu_enable_sva(struct device *dev) 


static int intel_iommu_enable_iopf(struct device *dev)

{

	struct pci_dev *pdev = dev_is_pci(dev) ? to_pci_dev(dev) : NULL;

	struct device_domain_info *info = dev_iommu_priv_get(dev);

	struct intel_iommu *iommu;

	int ret;



	if (!info || !info->ats_enabled || !info->pri_enabled)

	if (!pdev || !info || !info->ats_enabled || !info->pri_supported)

		return -ENODEV;



	if (info->pri_enabled)

		return -EBUSY;



	iommu = info->iommu;

	if (!iommu)

		return -EINVAL;



	/* PASID is required in PRG Response Message. */

	if (info->pasid_enabled && !pci_prg_resp_pasid_required(pdev))

		return -EINVAL;



	ret = pci_reset_pri(pdev);

	if (ret)

		return ret;



	ret = iopf_queue_add_device(iommu->iopf_queue, dev);

	if (ret)

		return ret;



	ret = iommu_register_device_fault_handler(dev, iommu_queue_iopf, dev);

	if (ret)

		goto iopf_remove_device;



	ret = pci_enable_pri(pdev, PRQ_DEPTH);

	if (ret)

		goto iopf_unregister_handler;

	info->pri_enabled = 1;



	return 0;



iopf_unregister_handler:

	iommu_unregister_device_fault_handler(dev);

iopf_remove_device:

	iopf_queue_remove_device(iommu->iopf_queue, dev);



	return ret;
@@ -4694,6 +4709,20 @@ static int intel_iommu_disable_iopf(struct device *dev) 
	struct intel_iommu *iommu = info->iommu;

	int ret;



	if (!info->pri_enabled)

		return -EINVAL;



	/*

	 * PCIe spec states that by clearing PRI enable bit, the Page

	 * Request Interface will not issue new page requests, but has

	 * outstanding page requests that have been transmitted or are

	 * queued for transmission. This is supposed to be called after

	 * the device driver has stopped DMA, all PASIDs have been

	 * unbound and the outstanding PRQs have been drained.

	 */

	pci_disable_pri(to_pci_dev(dev));

	info->pri_enabled = 0;



	ret = iommu_unregister_device_fault_handler(dev);

	if (ret)

		return ret;