Commit fb40bc3e authored by Ralf Baechle's avatar Ralf Baechle
Browse files

MIPS: Idle: Re-enable irqs at the end of r3081, au1k and loongson2 cpu_wait. 



Without this, the

    WARN_ON_ONCE(irqs_disabled());

in the idle loop will be triggered.

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent c9b6869d

arch/mips/kernel/idle.c

+2 −0
Original line number Original line Diff line number Diff line
@@ -34,6 +34,7 @@ static void r3081_wait(void) 
{

{

	unsigned long cfg = read_c0_conf();

	unsigned long cfg = read_c0_conf();

	write_c0_conf(cfg | R30XX_CONF_HALT);

	write_c0_conf(cfg | R30XX_CONF_HALT);

	local_irq_enable();

}

}





static void r39xx_wait(void)

static void r39xx_wait(void)
@@ -109,6 +110,7 @@ static void au1k_wait(void) 
	"	nop				\n"

	"	nop				\n"

	"	.set	mips0			\n"

	"	.set	mips0			\n"

	: : "r" (au1k_wait));

	: : "r" (au1k_wait));

	local_irq_enable();

}

}





static int __initdata nowait;

static int __initdata nowait;

drivers/cpufreq/loongson2_cpufreq.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -200,6 +200,7 @@ static void loongson2_cpu_wait(void) 
	LOONGSON_CHIPCFG0 &= ~0x7;	/* Put CPU into wait mode */

	LOONGSON_CHIPCFG0 &= ~0x7;	/* Put CPU into wait mode */

	LOONGSON_CHIPCFG0 = cpu_freq;	/* Restore CPU state */

	LOONGSON_CHIPCFG0 = cpu_freq;	/* Restore CPU state */

	spin_unlock_irqrestore(&loongson2_wait_lock, flags);

	spin_unlock_irqrestore(&loongson2_wait_lock, flags);

	local_irq_enable();

}

}





static int __init cpufreq_init(void)

static int __init cpufreq_init(void)