Commit fb34d8a0 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-misc-next-2022-09-09' of git://anongit.freedesktop.org/drm/drm-misc into drm-next 



drm-misc-next for v6.1-rc1:

[airlied - fix sun4i_tv build]

UAPI Changes:
- Hide unregistered connectors from GETCONNECTOR ioctl.
- drm/virtio no longer advertises LINEAR modifier, as it doesn't work.
-

Cross-subsystem Changes:
- Fix GPF in udmabuf failure path.

Core Changes:
- Rework TTM placement to use intersect/compatible functions.
- Drop legacy DP-MST support.
- More DP-MST related fixes, and move all state into atomic.
- Make DRM_MIPI_DBI select DRM_KMS_HELPER.
- Add audio_infoframe packing for DP.
- Add logging when some atomic check functions fail.
- Assorted documentation updates and fixes.

Driver Changes:
- Assorted cleanups and fixes in msm, lcdif, nouveau, virtio,
  panel/ilitek, bridge/icn6211, tve200, gma500, bridge/*, panfrost, via,
  bochs, qxl, sun4i.
- Add add AUO B133UAN02.1, IVO M133NW4J-R3, Innolux N120ACA-EA1 eDP panels.
- Improve DP-MST modeset state handling in amdgpu, nouveau, i915.
- Drop DP-MST from radeon driver, it was broken and only user of legacy
  DP-MST.
- Handle unplugging better in vc4.
- Simplify drm cmdparser tests.
- Add DP support to ti-sn65dsi86.
- Add MT8195 DP support to mediatek.
- Support RGB565, XRGB64, and ARGB64 formats in vkms.
- Convert sun4i tv support to atomic.
- Refactor vc4/vec TV Modesetting, and fix timings.
- Use atomic helpers instead of simple display helpers in ssd130x.

Maintainer changes:
- Add Douglas Anderson as reviewer for panel-edp.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/a489485b-3ebc-c734-0f80-aed963d89efe@linux.intel.com
parents 8284bae7 5d832b66

Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml

+9 −0
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@@ -24,6 +24,15 @@ properties: 
    maxItems: 1

    description: virtual channel number of a DSI peripheral



  clock-names:

    const: refclk



  clocks:

    maxItems: 1

    description: |

        Optional external clock connected to REF_CLK input.

        The clock rate must be in 10..154 MHz range.



  enable-gpios:

    description: Bridge EN pin, chip is reset when EN is low.

Documentation/devicetree/bindings/display/bridge/chrontel,ch7033.yaml

+13 −0
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@@ -14,6 +14,19 @@ properties: 
  compatible:

    const: chrontel,ch7033



  chrontel,byteswap:

    $ref: /schemas/types.yaml#/definitions/uint8

    enum:

      - 0  # BYTE_SWAP_RGB

      - 1  # BYTE_SWAP_RBG

      - 2  # BYTE_SWAP_GRB

      - 3  # BYTE_SWAP_GBR

      - 4  # BYTE_SWAP_BRG

      - 5  # BYTE_SWAP_BGR

    description: |

      Set the byteswap value of the bridge. This is optional and if not

      set value of BYTE_SWAP_BGR is used.



  reg:

    maxItems: 1

    description: I2C address of the device

Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml

0 → 100644
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: MediaTek Display Port Controller



maintainers:

  - Chun-Kuang Hu <chunkuang.hu@kernel.org>

  - Jitao shi <jitao.shi@mediatek.com>



description: |

  MediaTek DP and eDP are different hardwares and there are some features

  which are not supported for eDP. For example, audio is not supported for

  eDP. Therefore, we need to use two different compatibles to describe them.

  In addition, We just need to enable the power domain of DP, so the clock

  of DP is generated by itself and we are not using other PLL to generate

  clocks.



properties:

  compatible:

    enum:

      - mediatek,mt8195-dp-tx

      - mediatek,mt8195-edp-tx



  reg:

    maxItems: 1



  nvmem-cells:

    maxItems: 1

    description: efuse data for display port calibration



  nvmem-cell-names:

    const: dp_calibration_data



  power-domains:

    maxItems: 1



  interrupts:

    maxItems: 1



  ports:

    $ref: /schemas/graph.yaml#/properties/ports

    properties:

      port@0:

        $ref: /schemas/graph.yaml#/properties/port

        description: Input endpoint of the controller, usually dp_intf



      port@1:

        $ref: /schemas/graph.yaml#/$defs/port-base

        unevaluatedProperties: false

        description: Output endpoint of the controller

        properties:

          endpoint:

            $ref: /schemas/media/video-interfaces.yaml#

            unevaluatedProperties: false

            properties:

              data-lanes:

                description: |

                  number of lanes supported by the hardware.

                  The possible values:

                  0       - For 1 lane enabled in IP.

                  0 1     - For 2 lanes enabled in IP.

                  0 1 2 3 - For 4 lanes enabled in IP.

                minItems: 1

                maxItems: 4

            required:

              - data-lanes



    required:

      - port@0

      - port@1



  max-linkrate-mhz:

    enum: [ 1620, 2700, 5400, 8100 ]

    description: maximum link rate supported by the hardware.



required:

  - compatible

  - reg

  - interrupts

  - ports

  - max-linkrate-mhz



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/power/mt8195-power.h>

    dptx@1c600000 {

        compatible = "mediatek,mt8195-dp-tx";

        reg = <0x1c600000 0x8000>;

        power-domains = <&spm MT8195_POWER_DOMAIN_DP_TX>;

        interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0>;

        max-linkrate-mhz = <8100>;



        ports {

            #address-cells = <1>;

            #size-cells = <0>;



            port@0 {

                reg = <0>;

                dptx_in: endpoint {

                    remote-endpoint = <&dp_intf0_out>;

                };

            };

            port@1 {

                reg = <1>;

                dptx_out: endpoint {

                    data-lanes = <0 1 2 3>;

                };

            };

        };

    };

Documentation/gpu/vkms.rst

+1 −6
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@@ -118,15 +118,10 @@ Add Plane Features 


There's lots of plane features we could add support for:



- Clearing primary plane: clear primary plane before plane composition (at the

  start) for correctness of pixel blend ops. It also guarantees alpha channel

  is cleared in the target buffer for stable crc. [Good to get started]



- ARGB format on primary plane: blend the primary plane into background with

  translucent alpha.



- Support when the primary plane isn't exactly matching the output size: blend

  the primary plane into the black background.

- Add background color KMS property[Good to get started].



- Full alpha blending on all planes.

MAINTAINERS

+5 −0
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@@ -6419,6 +6419,11 @@ S: Maintained 
F:	Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml

F:	drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c









DRM DRIVER FOR GENERIC EDP PANELS









R:	Douglas Anderson <dianders@chromium.org>









F:	Documentation/devicetree/bindings/display/panel/panel-edp.yaml









F:	drivers/gpu/drm/panel/panel-edp.c

















DRM DRIVER FOR GENERIC USB DISPLAY









M:	Noralf Trønnes <noralf@tronnes.org>









S:	Maintained