Unverified Commit fb28a00d authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!10217 CVE-2024-35931 

Merge Pull Request from: @ci-robot 
 
PR sync from: Liu Chuang <liuchuang40@huawei.com>
https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/OO6JKLJJJM7LOUYU7B4HT4YLEMEGBL32/ 
Fixing CVE-2024-35931

Asad Kamal (1):
  drm/amdgpu : Add hive ras recovery check

Liu Chuang (1):
  drm/amdgpu: Fix kabi breakage in struct amdgpu_hive_info

Stanley.Yang (1):
  drm/amdgpu: Skip do PCI error slot reset during RAS recovery


-- 
2.34.1
 
https://gitee.com/src-openeuler/kernel/issues/I9QGL7 
 
Link:https://gitee.com/openeuler/kernel/pulls/10217

 

Reviewed-by: default avatarXu Kuohai <xukuohai@huawei.com>
Signed-off-by: default avatarYang Yingliang <yangyingliang@huawei.com>
parents 9af9a479 a1c00f53

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+16 −0
Original line number Diff line number Diff line
@@ -5005,6 +5005,22 @@ pci_ers_result_t amdgpu_pci_slot_reset(struct pci_dev *pdev) 
	bool need_full_reset = true;

	u32 memsize;

	struct list_head device_list;

	struct amdgpu_hive_info *hive;

	int hive_ras_recovery = 0;

	struct amdgpu_ras *ras;

	int major, minor, revision;



	/* PCI error slot reset should be skipped During RAS recovery */

	hive = amdgpu_get_xgmi_hive(adev);

	if (hive) {

		hive_ras_recovery = atomic_read(&hive->ras_recovery);

		amdgpu_put_xgmi_hive(hive);

	}

	ras = amdgpu_ras_get_context(adev);

	amdgpu_discovery_get_ip_version(adev, GC_HWIP, &major, &minor, &revision);

	if ((major == 9 && minor == 4 && revision == 3) &&

		 ras && (atomic_read(&ras->in_recovery) || hive_ras_recovery))

		return PCI_ERS_RESULT_RECOVERED;



	DRM_INFO("PCI error: slot reset callback!!\n");

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

+7 −2
Original line number Diff line number Diff line
@@ -1571,9 +1571,11 @@ static void amdgpu_ras_do_recovery(struct work_struct *work) 
	struct amdgpu_device *remote_adev = NULL;

	struct amdgpu_device *adev = ras->adev;

	struct list_head device_list, *device_list_handle =  NULL;

	struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev);



	if (hive)

		atomic_set(&hive->ras_recovery, 1);

	if (!ras->disable_ras_err_cnt_harvest) {

		struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev);



		/* Build list of devices to query RAS related errors */

		if  (hive && adev->gmc.xgmi.num_physical_nodes > 1) {
@@ -1590,12 +1592,15 @@ static void amdgpu_ras_do_recovery(struct work_struct *work) 
			amdgpu_ras_log_on_err_counter(remote_adev);

		}



		amdgpu_put_xgmi_hive(hive);

	}



	if (amdgpu_device_should_recover_gpu(ras->adev))

		amdgpu_device_gpu_recover(ras->adev, NULL);

	atomic_set(&ras->in_recovery, 0);

	if (hive) {

		atomic_set(&hive->ras_recovery, 0);

		amdgpu_put_xgmi_hive(hive);

	}

}



/* alloc/realloc bps array */

drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h

+2 −0
Original line number Diff line number Diff line
@@ -42,6 +42,8 @@ struct amdgpu_hive_info { 
		AMDGPU_XGMI_PSTATE_MAX_VEGA20,

		AMDGPU_XGMI_PSTATE_UNKNOWN

	} pstate;



	KABI_EXTEND(atomic_t ras_recovery)

};



struct amdgpu_pcs_ras_field {