Commit fad442d3 authored by Heiko Carstens's avatar Heiko Carstens
Browse files

s390/alternatives: provide identical sized orginal/alternative sequences 



Explicitly provide identical sized original/alternative instruction
sequences. This way there is no need for the s390 specific alternatives
infrastructure to generate padding sequences.
The code which generates such sequences will be removed with a follow on
patch.

Acked-by: default avatarVasily Gorbik <gor@linux.ibm.com>
Tested-by: default avatarNathan Chancellor <nathan@kernel.org>
Tested-by: default avatarNick Desaulniers <ndesaulniers@google.com>
Link: https://lore.kernel.org/r/20220511120532.2228616-2-hca@linux.ibm.com


Signed-off-by: default avatarHeiko Carstens <hca@linux.ibm.com>
parent c9311de7

arch/s390/include/asm/spinlock.h

+1 −1
Original line number Diff line number Diff line
@@ -79,7 +79,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lp) 
	typecheck(int, lp->lock);

	kcsan_release();

	asm_inline volatile(

		ALTERNATIVE("", ".insn rre,0xb2fa0000,7,0", 49)	/* NIAI 7 */

		ALTERNATIVE("nop", ".insn rre,0xb2fa0000,7,0", 49) /* NIAI 7 */

		"	sth	%1,%0\n"

		: "=R" (((unsigned short *) &lp->lock)[1])

		: "d" (0) : "cc", "memory");

arch/s390/kernel/entry.S

+10 −10
Original line number Diff line number Diff line
@@ -53,19 +53,19 @@ STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE 
_LPP_OFFSET	= __LC_LPP



	.macro STBEAR address

	ALTERNATIVE "", ".insn	s,0xb2010000,\address", 193

	ALTERNATIVE "nop", ".insn s,0xb2010000,\address", 193

	.endm



	.macro LBEAR address

	ALTERNATIVE "", ".insn	s,0xb2000000,\address", 193

	ALTERNATIVE "nop", ".insn s,0xb2000000,\address", 193

	.endm



	.macro LPSWEY address,lpswe

	ALTERNATIVE "b \lpswe", ".insn siy,0xeb0000000071,\address,0", 193

	ALTERNATIVE "b \lpswe; nopr", ".insn siy,0xeb0000000071,\address,0", 193

	.endm



	.macro MBEAR reg

	ALTERNATIVE "", __stringify(mvc __PT_LAST_BREAK(8,\reg),__LC_LAST_BREAK), 193

	ALTERNATIVE "brcl 0,0", __stringify(mvc __PT_LAST_BREAK(8,\reg),__LC_LAST_BREAK), 193

	.endm



	.macro	CHECK_STACK savearea
@@ -121,16 +121,16 @@ _LPP_OFFSET = __LC_LPP 
	.endm



	.macro BPOFF

	ALTERNATIVE "", ".insn rrf,0xb2e80000,0,0,12,0", 82

	ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,12,0", 82

	.endm



	.macro BPON

	ALTERNATIVE "", ".insn rrf,0xb2e80000,0,0,13,0", 82

	ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,13,0", 82

	.endm



	.macro BPENTER tif_ptr,tif_mask

	ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .insn rrf,0xb2e80000,0,0,13,0", \

		    "", 82

		    "j .+12; nop; nop", 82

	.endm



	.macro BPEXIT tif_ptr,tif_mask
@@ -226,7 +226,7 @@ ENTRY(__switch_to) 
	aghi	%r3,__TASK_pid

	mvc	__LC_CURRENT_PID(4,%r0),0(%r3)	# store pid of next

	lmg	%r6,%r15,__SF_GPRS(%r15)	# load gprs of next task

	ALTERNATIVE "", "lpp _LPP_OFFSET", 40

	ALTERNATIVE "nop", "lpp _LPP_OFFSET", 40

	BR_EX	%r14

ENDPROC(__switch_to)
@@ -610,7 +610,7 @@ ENTRY(mcck_int_handler) 
	jno	0f

	BPEXIT	__TI_flags(%r12),_TIF_ISOLATE_BP

	stpt	__LC_EXIT_TIMER

0:	ALTERNATIVE "", __stringify(lghi %r12,__LC_LAST_BREAK_SAVE_AREA),193

0:	ALTERNATIVE "nop", __stringify(lghi %r12,__LC_LAST_BREAK_SAVE_AREA),193

	LBEAR	0(%r12)

	lmg	%r11,%r15,__PT_R11(%r11)

	LPSWEY	__LC_RETURN_MCCK_PSW,__LC_RETURN_MCCK_LPSWE
@@ -646,7 +646,7 @@ ENTRY(mcck_int_handler) 
ENDPROC(mcck_int_handler)



ENTRY(restart_int_handler)

	ALTERNATIVE "", "lpp _LPP_OFFSET", 40

	ALTERNATIVE "nop", "lpp _LPP_OFFSET", 40

	stg	%r15,__LC_SAVE_AREA_RESTART

	TSTMSK	__LC_RESTART_FLAGS,RESTART_FLAG_CTLREGS,4

	jz	0f

arch/s390/lib/spinlock.c

+2 −2
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ static inline int arch_load_niai4(int *lock) 
	int owner;



	asm_inline volatile(

		ALTERNATIVE("", ".insn rre,0xb2fa0000,4,0", 49)	/* NIAI 4 */

		ALTERNATIVE("nop", ".insn rre,0xb2fa0000,4,0", 49) /* NIAI 4 */

		"	l	%0,%1\n"

		: "=d" (owner) : "Q" (*lock) : "memory");

	return owner;
@@ -86,7 +86,7 @@ static inline int arch_cmpxchg_niai8(int *lock, int old, int new) 
	int expected = old;



	asm_inline volatile(

		ALTERNATIVE("", ".insn rre,0xb2fa0000,8,0", 49)	/* NIAI 8 */

		ALTERNATIVE("nop", ".insn rre,0xb2fa0000,8,0", 49) /* NIAI 8 */

		"	cs	%0,%3,%1\n"

		: "=d" (old), "=Q" (*lock)

		: "0" (old), "d" (new), "Q" (*lock)