Unverified Commit fa8e7cce authored by Guo Ren's avatar Guo Ren Committed by Palmer Dabbelt
Browse files

riscv: Enable Vector code to be built 



This patch adds configs for building Vector code. First it detects the
reqired toolchain support for building the code. Then it provides an
option setting whether Vector is implicitly enabled to userspace.

Signed-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
Co-developed-by: default avatarGreentime Hu <greentime.hu@sifive.com>
Signed-off-by: default avatarGreentime Hu <greentime.hu@sifive.com>
Co-developed-by: default avatarAndy Chiu <andy.chiu@sifive.com>
Signed-off-by: default avatarAndy Chiu <andy.chiu@sifive.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230605110724.21391-25-andy.chiu@sifive.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent e4bb020f

arch/riscv/Kconfig

+31 −0
Original line number Diff line number Diff line
@@ -466,6 +466,37 @@ config RISCV_ISA_SVPBMT 


	   If you don't know what to do here, say Y.



config TOOLCHAIN_HAS_V

	bool

	default y

	depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64iv)

	depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32iv)

	depends on LLD_VERSION >= 140000 || LD_VERSION >= 23800

	depends on AS_HAS_OPTION_ARCH



config RISCV_ISA_V

	bool "VECTOR extension support"

	depends on TOOLCHAIN_HAS_V

	depends on FPU

	select DYNAMIC_SIGFRAME

	default y

	help

	  Say N here if you want to disable all vector related procedure

	  in the kernel.



	  If you don't know what to do here, say Y.



config RISCV_ISA_V_DEFAULT_ENABLE

	bool "Enable userspace Vector by default"

	depends on RISCV_ISA_V

	default y

	help

	  Say Y here if you want to enable Vector in userspace by default.

	  Otherwise, userspace has to make explicit prctl() call to enable

	  Vector, or enable it via the sysctl interface.



	  If you don't know what to do here, say Y.



config TOOLCHAIN_HAS_ZBB

	bool

	default y

arch/riscv/Makefile

+5 −1
Original line number Diff line number Diff line
@@ -60,6 +60,7 @@ riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima 
riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima

riscv-march-$(CONFIG_FPU)		:= $(riscv-march-y)fd

riscv-march-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-y)c

riscv-march-$(CONFIG_RISCV_ISA_V)	:= $(riscv-march-y)v



ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC

KBUILD_CFLAGS += -Wa,-misa-spec=2.2
@@ -71,7 +72,10 @@ endif 
# Check if the toolchain supports Zihintpause extension

riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) := $(riscv-march-y)_zihintpause



KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))

# Remove F,D,V from isa string for all. Keep extensions between "fd" and "v" by

# matching non-v and non-multi-letter extensions out with the filter ([^v_]*)

KBUILD_CFLAGS += -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)fd([^v_]*)v?/\1\2/')



KBUILD_AFLAGS += -march=$(riscv-march-y)



KBUILD_CFLAGS += -mno-save-restore