Commit fa68bff7 authored by Sujaritha Sundaresan's avatar Sujaritha Sundaresan Committed by Matthew Auld
Browse files

drm/i915/gt: Add sysfs throttle frequency interfaces 



Throttling here refers to the GT frequency being clipped. Each of
the throttle reason attributes will have a 0 or 1 value depending
upon whether there is throttling and also the specific reason for
it.

The following is a brief description of the sysfs throttle
frequency attributes added:

 - throttle_reason_status: when set indicates that there is GT
   frequency clipping.

 - throttle_reason_pl1: when set indicates that PBM PL1 (platform
   or package PL1) has caused GT frequency clipping.

 - throttle_reason_pl2: when set indicates that PBM PL2 or PL3
   (platform or package PL2 or PL3) has caused GT frequency
   clipping.

 - throttle_reason_pl4: when set indicates that PL4 or IccMax has
   caused GT frequency clipping.

 - throttle_reason_thermal: when set indicates that Thermal event
   has caused GT frequency clipping.

 - throttle_reason_prochot: when set indicates that PROCHOT# has
   caused GT frequency clipping.

 - throttle_reason_ratl: when set indicates that Running Average
   Thermal Limit has caused GT frequency clipping.

 - throttle_reason_vr_thermalert: when set indicates that Hot VR
   (any processor VR)  has caused GT frequency clipping.

 - throttle_reason_vr_tdc: when set indicates that VR TDC
   (Thermal Design Current)  has caused GT frequency clipping.

Signed-off-by: default avatarSujaritha Sundaresan <sujaritha.sundaresan@intel.com>
Signed-off-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Cc: Dale B Stimson <dale.b.stimson@intel.com>
Reviewed-by: default avatarAndrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: default avatarMatthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220318233938.149744-8-andi.shyti@linux.intel.com
parent 56a709cf

drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c

+74 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
#include <linux/printk.h>



#include "i915_drv.h"

#include "i915_reg.h"

#include "i915_sysfs.h"

#include "intel_gt.h"

#include "intel_gt_regs.h"
@@ -493,6 +494,69 @@ static DEVICE_ATTR_RO(vlv_rpe_freq_mhz); 
static const struct attribute * const gen6_rps_attrs[] = GEN6_RPS_ATTR;

static const struct attribute * const gen6_gt_attrs[]  = GEN6_GT_ATTR;



static ssize_t punit_req_freq_mhz_show(struct device *dev,

				       struct device_attribute *attr,

				       char *buff)

{

	struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);

	u32 preq = intel_rps_read_punit_req_frequency(&gt->rps);



	return sysfs_emit(buff, "%u\n", preq);

}



struct intel_gt_bool_throttle_attr {

	struct attribute attr;

	ssize_t (*show)(struct device *dev, struct device_attribute *attr,

			char *buf);

	i915_reg_t reg32;

	u32 mask;

};



static ssize_t throttle_reason_bool_show(struct device *dev,

					 struct device_attribute *attr,

					 char *buff)

{

	struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);

	struct intel_gt_bool_throttle_attr *t_attr =

				(struct intel_gt_bool_throttle_attr *) attr;

	bool val = rps_read_mask_mmio(&gt->rps, t_attr->reg32, t_attr->mask);



	return sysfs_emit(buff, "%u\n", val);

}



#define INTEL_GT_RPS_BOOL_ATTR_RO(sysfs_func__, mask__) \

struct intel_gt_bool_throttle_attr attr_##sysfs_func__ = { \

	.attr = { .name = __stringify(sysfs_func__), .mode = 0444 }, \

	.show = throttle_reason_bool_show, \

	.reg32 = GT0_PERF_LIMIT_REASONS, \

	.mask = mask__, \

}



static DEVICE_ATTR_RO(punit_req_freq_mhz);

static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_status, GT0_PERF_LIMIT_REASONS_MASK);

static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_pl1, POWER_LIMIT_1_MASK);

static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_pl2, POWER_LIMIT_2_MASK);

static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_pl4, POWER_LIMIT_4_MASK);

static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_thermal, THERMAL_LIMIT_MASK);

static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_prochot, PROCHOT_MASK);

static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_ratl, RATL_MASK);

static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_vr_thermalert, VR_THERMALERT_MASK);

static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_vr_tdc, VR_TDC_MASK);



static const struct attribute *freq_attrs[] = {

	&dev_attr_punit_req_freq_mhz.attr,

	&attr_throttle_reason_status.attr,

	&attr_throttle_reason_pl1.attr,

	&attr_throttle_reason_pl2.attr,

	&attr_throttle_reason_pl4.attr,

	&attr_throttle_reason_thermal.attr,

	&attr_throttle_reason_prochot.attr,

	&attr_throttle_reason_ratl.attr,

	&attr_throttle_reason_vr_thermalert.attr,

	&attr_throttle_reason_vr_tdc.attr,

	NULL

};



static int intel_sysfs_rps_init(struct intel_gt *gt, struct kobject *kobj,

				const struct attribute * const *attrs)

{
@@ -524,4 +588,14 @@ void intel_gt_sysfs_pm_init(struct intel_gt *gt, struct kobject *kobj) 
		drm_warn(&gt->i915->drm,

			 "failed to create gt%u RPS sysfs files (%pe)",

			 gt->info.id, ERR_PTR(ret));



	/* end of the legacy interfaces */

	if (!is_object_gt(kobj))

		return;



	ret = sysfs_create_files(kobj, freq_attrs);

	if (ret)

		drm_warn(&gt->i915->drm,

			 "failed to create gt%u throttle sysfs files (%pe)",

			 gt->info.id, ERR_PTR(ret));

}

drivers/gpu/drm/i915/gt/intel_rps.c

+18 −0
Original line number Diff line number Diff line
@@ -2286,6 +2286,24 @@ void intel_rps_lower_unslice(struct intel_rps *rps) 
	mutex_unlock(&rps->lock);

}



static u32 rps_read_mmio(struct intel_rps *rps, i915_reg_t reg32)

{

	struct intel_gt *gt = rps_to_gt(rps);

	intel_wakeref_t wakeref;

	u32 val;



	with_intel_runtime_pm(gt->uncore->rpm, wakeref)

		val = intel_uncore_read(gt->uncore, reg32);



	return val;

}



bool rps_read_mask_mmio(struct intel_rps *rps,

			i915_reg_t reg32, u32 mask)

{

	return rps_read_mmio(rps, reg32) & mask;

}



/* External interface for intel_ips.ko */



static struct drm_i915_private __rcu *ips_mchdev;

drivers/gpu/drm/i915/gt/intel_rps.h

+4 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#define INTEL_RPS_H



#include "intel_rps_types.h"

#include "i915_reg_defs.h"



struct i915_request;
@@ -48,6 +49,9 @@ u32 intel_rps_read_state_cap(struct intel_rps *rps); 
void intel_rps_raise_unslice(struct intel_rps *rps);

void intel_rps_lower_unslice(struct intel_rps *rps);



u32 intel_rps_read_throttle_reason(struct intel_rps *rps);

bool rps_read_mask_mmio(struct intel_rps *rps, i915_reg_t reg32, u32 mask);



void gen5_rps_irq_handler(struct intel_rps *rps);

void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir);

void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir);

drivers/gpu/drm/i915/i915_reg.h

+11 −0
Original line number Diff line number Diff line
@@ -1837,6 +1837,17 @@ 
#define GEN9_RP_STATE_LIMITS	_MMIO(0x138148)

#define XEHPSDV_RP_STATE_CAP	_MMIO(0x250014)



#define GT0_PERF_LIMIT_REASONS		_MMIO(0x1381a8)

#define   GT0_PERF_LIMIT_REASONS_MASK	0xde3

#define   PROCHOT_MASK			REG_BIT(1)

#define   THERMAL_LIMIT_MASK		REG_BIT(2)

#define   RATL_MASK			REG_BIT(6)

#define   VR_THERMALERT_MASK		REG_BIT(7)

#define   VR_TDC_MASK			REG_BIT(8)

#define   POWER_LIMIT_4_MASK		REG_BIT(9)

#define   POWER_LIMIT_1_MASK		REG_BIT(11)

#define   POWER_LIMIT_2_MASK		REG_BIT(12)



#define CHV_CLK_CTL1			_MMIO(0x101100)

#define VLV_CLK_CTL2			_MMIO(0x101104)

#define   CLK_CTL2_CZCOUNT_30NS_SHIFT	28