Commit fa1ea742 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
Browse files

clk: qcom: gcc-qcs404: get rid of the test clock 



The test clock isn't in the bindings and apparently it's not used by
anyone upstream.  Remove it.

Suggested-by: default avatarStephen Boyd <swboyd@chromium.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226042154.2666748-9-dmitry.baryshkov@linaro.org
parent a613af2c

drivers/clk/qcom/gcc-qcs404.c

+0 −34
Original line number Diff line number Diff line
@@ -22,7 +22,6 @@ 
#include "reset.h"



enum {

	P_CORE_BI_PLL_TEST_SE,

	P_DSI0_PHY_PLL_OUT_BYTECLK,

	P_DSI0_PHY_PLL_OUT_DSICLK,

	P_GPLL0_OUT_MAIN,
@@ -39,29 +38,24 @@ enum { 
static const struct parent_map gcc_parent_map_0[] = {

	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_0[] = {

	"cxo",

	"gpll0_out_main",

	"core_bi_pll_test_se",

};



static const char * const gcc_parent_names_ao_0[] = {

	"cxo",

	"gpll0_ao_out_main",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_1[] = {

	{ P_XO, 0 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_1[] = {

	"cxo",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_2[] = {
@@ -82,50 +76,42 @@ static const struct parent_map gcc_parent_map_3[] = { 
	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_GPLL6_OUT_AUX, 2 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_3[] = {

	"cxo",

	"gpll0_out_main",

	"gpll6_out_aux",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_4[] = {

	{ P_XO, 0 },

	{ P_GPLL1_OUT_MAIN, 1 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_4[] = {

	"cxo",

	"gpll1_out_main",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_5[] = {

	{ P_XO, 0 },

	{ P_DSI0_PHY_PLL_OUT_BYTECLK, 1 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_5[] = {

	"cxo",

	"dsi0pllbyte",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_6[] = {

	{ P_XO, 0 },

	{ P_DSI0_PHY_PLL_OUT_BYTECLK, 2 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_6[] = {

	"cxo",

	"dsi0pllbyte",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_7[] = {
@@ -133,7 +119,6 @@ static const struct parent_map gcc_parent_map_7[] = { 
	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_GPLL3_OUT_MAIN, 2 },

	{ P_GPLL6_OUT_AUX, 3 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_7[] = {
@@ -141,19 +126,16 @@ static const char * const gcc_parent_names_7[] = { 
	"gpll0_out_main",

	"gpll3_out_main",

	"gpll6_out_aux",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_8[] = {

	{ P_XO, 0 },

	{ P_HDMI_PHY_PLL_CLK, 1 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_8[] = {

	"cxo",

	"hdmi_pll",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_9[] = {
@@ -161,7 +143,6 @@ static const struct parent_map gcc_parent_map_9[] = { 
	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_DSI0_PHY_PLL_OUT_DSICLK, 2 },

	{ P_GPLL6_OUT_AUX, 3 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_9[] = {
@@ -169,43 +150,36 @@ static const char * const gcc_parent_names_9[] = { 
	"gpll0_out_main",

	"dsi0pll",

	"gpll6_out_aux",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_10[] = {

	{ P_XO, 0 },

	{ P_SLEEP_CLK, 1 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_10[] = {

	"cxo",

	"sleep_clk",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_11[] = {

	{ P_XO, 0 },

	{ P_PCIE_0_PIPE_CLK, 1 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_11[] = {

	"cxo",

	"pcie_0_pipe_clk",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_12[] = {

	{ P_XO, 0 },

	{ P_DSI0_PHY_PLL_OUT_DSICLK, 1 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_12[] = {

	"cxo",

	"dsi0pll",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_13[] = {
@@ -213,7 +187,6 @@ static const struct parent_map gcc_parent_map_13[] = { 
	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_GPLL4_OUT_MAIN, 2 },

	{ P_GPLL6_OUT_AUX, 3 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_13[] = {
@@ -221,41 +194,34 @@ static const char * const gcc_parent_names_13[] = { 
	"gpll0_out_main",

	"gpll4_out_main",

	"gpll6_out_aux",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_14[] = {

	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_14[] = {

	"cxo",

	"gpll0_out_main",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_15[] = {

	{ P_XO, 0 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_15[] = {

	"cxo",

	"core_bi_pll_test_se",

};



static const struct parent_map gcc_parent_map_16[] = {

	{ P_XO, 0 },

	{ P_GPLL0_OUT_MAIN, 1 },

	{ P_CORE_BI_PLL_TEST_SE, 7 },

};



static const char * const gcc_parent_names_16[] = {

	"cxo",

	"gpll0_out_main",

	"core_bi_pll_test_se",

};



static struct clk_fixed_factor cxo = {