Commit f9cd51bf authored by Tero Kristo's avatar Tero Kristo Committed by Tony Lindgren
Browse files

ARM: dts: omap5: add aes1 entry 



OMAP5 has AES hardware cryptographic accelerator, add AES1 instance for
it.

Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 1f159805

arch/arm/boot/dts/omap5.dtsi

+29 −0
Original line number Diff line number Diff line
@@ -247,6 +247,35 @@ 
			hw-caps-temp-alert;

		};



		aes1_target: target-module@4b501000 {

			compatible = "ti,sysc-omap2", "ti,sysc";

			reg = <0x4b501080 0x4>,

			      <0x4b501084 0x4>,

			      <0x4b501088 0x4>;

			reg-names = "rev", "sysc", "syss";

			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |

					 SYSC_OMAP2_AUTOIDLE)>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>,

					<SYSC_IDLE_SMART_WKUP>;

			ti,syss-mask = <1>;

			/* Domains (P, C): l4per_pwrdm, l4sec_clkdm */

			clocks = <&l4sec_clkctrl OMAP5_AES1_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x4b501000 0x1000>;



			aes1: aes@0 {

				compatible = "ti,omap4-aes";

				reg = <0 0xa0>;

				interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;

				dmas = <&sdma 111>, <&sdma 110>;

				dma-names = "tx", "rx";

			};

		};



		bandgap: bandgap@4a0021e0 {

			reg = <0x4a0021e0 0xc

			       0x4a00232c 0xc