Commit f9be3000 authored Jul 20, 2021 by Lucas De Marchi

drm/i915/gt: nuke unused legacy engine hw_id



The engine hw_id is only used by RING_FAULT_REG(), which is not used
by GRAPHICS_VER >= 8. We did use hw_id on recent platforms to set
the engine's guc_id, but that is not the case anymore since
commit c784e524 ("drm/i915/guc: Update to use firmware v49.0.1"):
now we only use class and id information to generate guc_id.

We tend to keep adding new defines just to be consistent, but let's try
to remove them and let them defined to 0 for engines that only exist on
gen8+ platforms.

v2: Reword commit message and add information about when we stopped
using hw_id (Matt Roper)

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210720232014.3302645-3-lucas.demarchi@intel.com

parent 7894375e

drivers/gpu/drm/i915/gt/intel_engine_cs.c

+0 −4

Original line number	Diff line number	Diff line
		@@ -80,7 +80,6 @@ static const struct engine_info intel_engines[] = {
		},
		},
		[VCS1] = {
		.hw_id = VCS1_HW,
		.class = VIDEO_DECODE_CLASS,
		.instance = 1,
		.mmio_bases = {
		@@ -89,7 +88,6 @@ static const struct engine_info intel_engines[] = {
		},
		},
		[VCS2] = {
		.hw_id = VCS2_HW,
		.class = VIDEO_DECODE_CLASS,
		.instance = 2,
		.mmio_bases = {
		@@ -97,7 +95,6 @@ static const struct engine_info intel_engines[] = {
		},
		},
		[VCS3] = {
		.hw_id = VCS3_HW,
		.class = VIDEO_DECODE_CLASS,
		.instance = 3,
		.mmio_bases = {
		@@ -114,7 +111,6 @@ static const struct engine_info intel_engines[] = {
		},
		},
		[VECS1] = {
		.hw_id = VECS1_HW,
		.class = VIDEO_ENHANCEMENT_CLASS,
		.instance = 1,
		.mmio_bases = {

drivers/gpu/drm/i915/gt/intel_engine_types.h

+0 −4

Original line number	Diff line number	Diff line
		@@ -34,10 +34,6 @@
		#define VCS0_HW 1
		#define BCS0_HW 2
		#define VECS0_HW 3
		#define VCS1_HW 4
		#define VCS2_HW 6
		#define VCS3_HW 7
		#define VECS1_HW 12

		/* Gen11+ HW Engine class + instance */
		#define RENDER_CLASS 0