Commit f98a3dcc authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Peter Zijlstra
Browse files

locking: Remove spin_lock_flags() etc 



parisc, ia64 and powerpc32 are the only remaining architectures that
provide custom arch_{spin,read,write}_lock_flags() functions, which are
meant to re-enable interrupts while waiting for a spinlock.

However, none of these can actually run into this codepath, because
it is only called on architectures without CONFIG_GENERIC_LOCKBREAK,
or when CONFIG_DEBUG_LOCK_ALLOC is set without CONFIG_LOCKDEP, and none
of those combinations are possible on the three architectures.

Going back in the git history, it appears that arch/mn10300 may have
been able to run into this code path, but there is a good chance that
it never worked. On the architectures that still exist, it was
already impossible to hit back in 2008 after the introduction of
CONFIG_GENERIC_LOCKBREAK, and possibly earlier.

As this is all dead code, just remove it and the helper functions built
around it. For arch/ia64, the inline asm could be cleaned up, but
it seems safer to leave it untouched.

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Helge Deller <deller@gmx.de>  # parisc
Link: https://lore.kernel.org/r/20211022120058.1031690-1-arnd@kernel.org
parent 5197fcd0

arch/ia64/include/asm/spinlock.h

+6 −17
Original line number Diff line number Diff line
@@ -124,18 +124,13 @@ static __always_inline void arch_spin_unlock(arch_spinlock_t *lock) 
	__ticket_spin_unlock(lock);

}



static __always_inline void arch_spin_lock_flags(arch_spinlock_t *lock,

						  unsigned long flags)

{

	arch_spin_lock(lock);

}

#define arch_spin_lock_flags	arch_spin_lock_flags



#ifdef ASM_SUPPORTED



static __always_inline void

arch_read_lock_flags(arch_rwlock_t *lock, unsigned long flags)

arch_read_lock(arch_rwlock_t *lock)

{

	unsigned long flags = 0;



	__asm__ __volatile__ (

		"tbit.nz p6, p0 = %1,%2\n"

		"br.few 3f\n"
@@ -157,13 +152,8 @@ arch_read_lock_flags(arch_rwlock_t *lock, unsigned long flags) 
		: "p6", "p7", "r2", "memory");

}



#define arch_read_lock_flags arch_read_lock_flags

#define arch_read_lock(lock) arch_read_lock_flags(lock, 0)



#else /* !ASM_SUPPORTED */



#define arch_read_lock_flags(rw, flags) arch_read_lock(rw)



#define arch_read_lock(rw)								\

do {											\

	arch_rwlock_t *__read_lock_ptr = (rw);						\
@@ -186,8 +176,10 @@ do { \ 
#ifdef ASM_SUPPORTED



static __always_inline void

arch_write_lock_flags(arch_rwlock_t *lock, unsigned long flags)

arch_write_lock(arch_rwlock_t *lock)

{

	unsigned long flags = 0;



	__asm__ __volatile__ (

		"tbit.nz p6, p0 = %1, %2\n"

		"mov ar.ccv = r0\n"
@@ -210,9 +202,6 @@ arch_write_lock_flags(arch_rwlock_t *lock, unsigned long flags) 
		: "ar.ccv", "p6", "p7", "r2", "r29", "memory");

}



#define arch_write_lock_flags arch_write_lock_flags

#define arch_write_lock(rw) arch_write_lock_flags(rw, 0)



#define arch_write_trylock(rw)							\

({										\

	register long result;							\

arch/openrisc/include/asm/spinlock.h

+0 −3
Original line number Diff line number Diff line
@@ -19,9 +19,6 @@ 


#include <asm/qrwlock.h>



#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)

#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)



#define arch_spin_relax(lock)	cpu_relax()

#define arch_read_relax(lock)	cpu_relax()

#define arch_write_relax(lock)	cpu_relax()

arch/parisc/include/asm/spinlock.h

+0 −15
Original line number Diff line number Diff line
@@ -23,21 +23,6 @@ static inline void arch_spin_lock(arch_spinlock_t *x) 
			continue;

}



static inline void arch_spin_lock_flags(arch_spinlock_t *x,

					unsigned long flags)

{

	volatile unsigned int *a;



	a = __ldcw_align(x);

	while (__ldcw(a) == 0)

		while (*a == 0)

			if (flags & PSW_SM_I) {

				local_irq_enable();

				local_irq_disable();

			}

}

#define arch_spin_lock_flags arch_spin_lock_flags



static inline void arch_spin_unlock(arch_spinlock_t *x)

{

	volatile unsigned int *a;

arch/powerpc/include/asm/simple_spinlock.h

+0 −21
Original line number Diff line number Diff line
@@ -123,27 +123,6 @@ static inline void arch_spin_lock(arch_spinlock_t *lock) 
	}

}



static inline

void arch_spin_lock_flags(arch_spinlock_t *lock, unsigned long flags)

{

	unsigned long flags_dis;



	while (1) {

		if (likely(__arch_spin_trylock(lock) == 0))

			break;

		local_save_flags(flags_dis);

		local_irq_restore(flags);

		do {

			HMT_low();

			if (is_shared_processor())

				splpar_spin_yield(lock);

		} while (unlikely(lock->slock != 0));

		HMT_medium();

		local_irq_restore(flags_dis);

	}

}

#define arch_spin_lock_flags arch_spin_lock_flags



static inline void arch_spin_unlock(arch_spinlock_t *lock)

{

	__asm__ __volatile__("# arch_spin_unlock\n\t"

arch/s390/include/asm/spinlock.h

+0 −8
Original line number Diff line number Diff line
@@ -67,14 +67,6 @@ static inline void arch_spin_lock(arch_spinlock_t *lp) 
		arch_spin_lock_wait(lp);

}



static inline void arch_spin_lock_flags(arch_spinlock_t *lp,

					unsigned long flags)

{

	if (!arch_spin_trylock_once(lp))

		arch_spin_lock_wait(lp);

}

#define arch_spin_lock_flags	arch_spin_lock_flags



static inline int arch_spin_trylock(arch_spinlock_t *lp)

{

	if (!arch_spin_trylock_once(lp))