Commit f9538e27 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/dpc' 

- Work around a BIOS defect that makes some Intel Root Ports report an RP
  PIO log size of zero (Mika Westerberg)

* pci/dpc:
  PCI/DPC: Quirk PIO log size for certain Intel Root Ports
parents c1c2d892 5459c0b7

drivers/pci/pcie/dpc.c

+10 −5
Original line number Diff line number Diff line
@@ -335,13 +335,18 @@ void pci_dpc_init(struct pci_dev *pdev) 
		return;



	pdev->dpc_rp_extensions = true;

	pdev->dpc_rp_log_size = (cap & PCI_EXP_DPC_RP_PIO_LOG_SIZE) >> 8;



	/* Quirks may set dpc_rp_log_size if device or firmware is buggy */

	if (!pdev->dpc_rp_log_size) {

		pdev->dpc_rp_log_size =

			(cap & PCI_EXP_DPC_RP_PIO_LOG_SIZE) >> 8;

		if (pdev->dpc_rp_log_size < 4 || pdev->dpc_rp_log_size > 9) {

			pci_err(pdev, "RP PIO log size %u is invalid\n",

				pdev->dpc_rp_log_size);

			pdev->dpc_rp_log_size = 0;

		}

	}

}



#define FLAG(x, y) (((x) & (y)) ? '+' : '-')

static int dpc_probe(struct pcie_device *dev)

drivers/pci/quirks.c

+36 −0
Original line number Diff line number Diff line
@@ -5956,3 +5956,39 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x56b1, aspm_l1_acceptable_latency 
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x56c0, aspm_l1_acceptable_latency);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x56c1, aspm_l1_acceptable_latency);

#endif



#ifdef CONFIG_PCIE_DPC

/*

 * Intel Tiger Lake and Alder Lake BIOS has a bug that clears the DPC

 * RP PIO Log Size of the integrated Thunderbolt PCIe Root Ports.

 */

static void dpc_log_size(struct pci_dev *dev)

{

	u16 dpc, val;



	dpc = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC);

	if (!dpc)

		return;



	pci_read_config_word(dev, dpc + PCI_EXP_DPC_CAP, &val);

	if (!(val & PCI_EXP_DPC_CAP_RP_EXT))

		return;



	if (!((val & PCI_EXP_DPC_RP_PIO_LOG_SIZE) >> 8)) {

		pci_info(dev, "Overriding RP PIO Log Size to 4\n");

		dev->dpc_rp_log_size = 4;

	}

}

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x461f, dpc_log_size);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x462f, dpc_log_size);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x463f, dpc_log_size);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x466e, dpc_log_size);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a23, dpc_log_size);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a25, dpc_log_size);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a27, dpc_log_size);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a29, dpc_log_size);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2b, dpc_log_size);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2d, dpc_log_size);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2f, dpc_log_size);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a31, dpc_log_size);

#endif