Commit f951eb08 authored by Ofir Bitton's avatar Ofir Bitton Committed by Oded Gabbay
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habanalabs/gaudi: unsecure TPC cfg status registers 



Unsecure relevant registers as TPC engine need access to
TPC status.

Signed-off-by: default avatarOfir Bitton <obitton@habana.ai>
Reviewed-by: default avatarOded Gabbay <ogabbay@kernel.org>
Signed-off-by: default avatarOded Gabbay <ogabbay@kernel.org>
parent 12e66a17

drivers/misc/habanalabs/gaudi/gaudi_security.c

+0 −8
Original line number Diff line number Diff line
@@ -9556,7 +9556,6 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev) 
	mask = 1U << ((mmTPC0_CFG_PROT & 0x7F) >> 2);

	mask |= 1U << ((mmTPC0_CFG_VFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC0_CFG_SFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC0_CFG_STATUS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);

	mask |= 1U << ((mmTPC0_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);

	mask |= 1U << ((mmTPC0_CFG_TPC_STALL & 0x7F) >> 2);
@@ -10011,7 +10010,6 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev) 
	mask = 1U << ((mmTPC1_CFG_PROT & 0x7F) >> 2);

	mask |= 1U << ((mmTPC1_CFG_VFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC1_CFG_SFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC1_CFG_STATUS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC1_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);

	mask |= 1U << ((mmTPC1_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);

	mask |= 1U << ((mmTPC1_CFG_TPC_STALL & 0x7F) >> 2);
@@ -10465,7 +10463,6 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev) 
	mask = 1U << ((mmTPC2_CFG_PROT & 0x7F) >> 2);

	mask |= 1U << ((mmTPC2_CFG_VFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC2_CFG_SFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC2_CFG_STATUS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC2_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);

	mask |= 1U << ((mmTPC2_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);

	mask |= 1U << ((mmTPC2_CFG_TPC_STALL & 0x7F) >> 2);
@@ -10919,7 +10916,6 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev) 
	mask = 1U << ((mmTPC3_CFG_PROT & 0x7F) >> 2);

	mask |= 1U << ((mmTPC3_CFG_VFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC3_CFG_SFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC3_CFG_STATUS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC3_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);

	mask |= 1U << ((mmTPC3_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);

	mask |= 1U << ((mmTPC3_CFG_TPC_STALL & 0x7F) >> 2);
@@ -11373,7 +11369,6 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev) 
	mask = 1U << ((mmTPC4_CFG_PROT & 0x7F) >> 2);

	mask |= 1U << ((mmTPC4_CFG_VFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC4_CFG_SFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC4_CFG_STATUS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC4_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);

	mask |= 1U << ((mmTPC4_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);

	mask |= 1U << ((mmTPC4_CFG_TPC_STALL & 0x7F) >> 2);
@@ -11827,7 +11822,6 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev) 
	mask = 1U << ((mmTPC5_CFG_PROT & 0x7F) >> 2);

	mask |= 1U << ((mmTPC5_CFG_VFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC5_CFG_SFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC5_CFG_STATUS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC5_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);

	mask |= 1U << ((mmTPC5_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);

	mask |= 1U << ((mmTPC5_CFG_TPC_STALL & 0x7F) >> 2);
@@ -12283,7 +12277,6 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev) 
	mask = 1U << ((mmTPC6_CFG_PROT & 0x7F) >> 2);

	mask |= 1U << ((mmTPC6_CFG_VFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC6_CFG_SFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC6_CFG_STATUS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC6_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);

	mask |= 1U << ((mmTPC6_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);

	mask |= 1U << ((mmTPC6_CFG_TPC_STALL & 0x7F) >> 2);
@@ -12739,7 +12732,6 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev) 
	mask = 1U << ((mmTPC7_CFG_PROT & 0x7F) >> 2);

	mask |= 1U << ((mmTPC7_CFG_VFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC7_CFG_SFLAGS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC7_CFG_STATUS & 0x7F) >> 2);

	mask |= 1U << ((mmTPC7_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);

	mask |= 1U << ((mmTPC7_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);

	mask |= 1U << ((mmTPC7_CFG_TPC_STALL & 0x7F) >> 2);