Commit f92faa80 authored by Pu Wen's avatar Pu Wen
Browse files

EDAC/amd64: Add support for Hygon family 18h model 6h

hygon inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I7DX6V


CVE: NA

---------------------------

Add F0/F6 device IDs for Hygon family 18h model 6h processor.

Signed-off-by: default avatarPu Wen <puwen@hygon.cn>
parent 950b6f3c
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+14 −0
Original line number Diff line number Diff line
@@ -2433,6 +2433,16 @@ static struct amd64_family_type family_types[] = {
			.dbam_to_cs		= f17_addr_mask_to_cs_size,
		}
	},
	[F18_M06H_CPUS] = {
		.ctl_name = "F18h_M06h",
		.f0_id = PCI_DEVICE_ID_HYGON_18H_M06H_DF_F0,
		.f6_id = PCI_DEVICE_ID_HYGON_18H_M06H_DF_F6,
		.max_mcs = 2,
		.ops = {
			.early_channel_count	= f17_early_channel_count,
			.dbam_to_cs		= f17_addr_mask_to_cs_size,
		}
	},
	[F19_CPUS] = {
		.ctl_name = "F19h",
		.f0_id = PCI_DEVICE_ID_AMD_19H_DF_F0,
@@ -3538,6 +3548,10 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
			family_types[F17_M30H_CPUS].max_mcs = 1;
			family_types[F17_M30H_CPUS].ctl_name = "F18h_M05h";
			break;
		} else if (pvt->model == 0x6) {
			fam_type = &family_types[F18_M06H_CPUS];
			pvt->ops = &family_types[F18_M06H_CPUS].ops;
			break;
		}
		fam_type	= &family_types[F17_CPUS];
		pvt->ops	= &family_types[F17_CPUS].ops;
+4 −0
Original line number Diff line number Diff line
@@ -127,6 +127,9 @@
#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F0 0x14ad
#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F6 0x14b3

#define PCI_DEVICE_ID_HYGON_18H_M06H_DF_F0 0x14b0
#define PCI_DEVICE_ID_HYGON_18H_M06H_DF_F6 0x14b6

/*
 * Function 1 - Address Map
 */
@@ -299,6 +302,7 @@ enum amd_families {
	F17_M10H_CPUS,
	F17_M30H_CPUS,
	F17_M70H_CPUS,
	F18_M06H_CPUS,
	F19_CPUS,
	F19_M10H_CPUS,
	NUM_FAMILIES,