Loading arch/arm/kernel/entry-armv.S +0 −18 Original line number Diff line number Diff line Loading @@ -192,11 +192,6 @@ __dabt_svc: svc_entry mov r2, sp dabt_helper @ @ IRQs off again before pulling preserved data off the stack @ disable_irq_notrace svc_exit r5 @ return from exception UNWIND(.fnend ) ENDPROC(__dabt_svc) Loading Loading @@ -283,15 +278,7 @@ __und_svc_fault: mov r0, sp @ struct pt_regs *regs bl __und_fault @ @ IRQs off again before pulling preserved data off the stack @ __und_svc_finish: disable_irq_notrace @ @ restore SPSR and restart the instruction @ ldr r5, [sp, #S_PSR] @ Get SVC cpsr svc_exit r5 @ return from exception UNWIND(.fnend ) Loading @@ -302,11 +289,6 @@ __pabt_svc: svc_entry mov r2, sp @ regs pabt_helper @ @ IRQs off again before pulling preserved data off the stack @ disable_irq_notrace svc_exit r5 @ return from exception UNWIND(.fnend ) ENDPROC(__pabt_svc) Loading arch/arm/kernel/entry-header.S +6 −0 Original line number Diff line number Diff line Loading @@ -76,12 +76,15 @@ #ifndef CONFIG_THUMB2_KERNEL .macro svc_exit, rpsr, irq = 0 .if \irq != 0 @ IRQs already off #ifdef CONFIG_TRACE_IRQFLAGS @ The parent context IRQs must have been enabled to get here in @ the first place, so there's no point checking the PSR I bit. bl trace_hardirqs_on #endif .else @ IRQs off again before pulling preserved data off the stack disable_irq_notrace #ifdef CONFIG_TRACE_IRQFLAGS tst \rpsr, #PSR_I_BIT bleq trace_hardirqs_on Loading Loading @@ -136,12 +139,15 @@ #else /* CONFIG_THUMB2_KERNEL */ .macro svc_exit, rpsr, irq = 0 .if \irq != 0 @ IRQs already off #ifdef CONFIG_TRACE_IRQFLAGS @ The parent context IRQs must have been enabled to get here in @ the first place, so there's no point checking the PSR I bit. bl trace_hardirqs_on #endif .else @ IRQs off again before pulling preserved data off the stack disable_irq_notrace #ifdef CONFIG_TRACE_IRQFLAGS tst \rpsr, #PSR_I_BIT bleq trace_hardirqs_on Loading Loading
arch/arm/kernel/entry-armv.S +0 −18 Original line number Diff line number Diff line Loading @@ -192,11 +192,6 @@ __dabt_svc: svc_entry mov r2, sp dabt_helper @ @ IRQs off again before pulling preserved data off the stack @ disable_irq_notrace svc_exit r5 @ return from exception UNWIND(.fnend ) ENDPROC(__dabt_svc) Loading Loading @@ -283,15 +278,7 @@ __und_svc_fault: mov r0, sp @ struct pt_regs *regs bl __und_fault @ @ IRQs off again before pulling preserved data off the stack @ __und_svc_finish: disable_irq_notrace @ @ restore SPSR and restart the instruction @ ldr r5, [sp, #S_PSR] @ Get SVC cpsr svc_exit r5 @ return from exception UNWIND(.fnend ) Loading @@ -302,11 +289,6 @@ __pabt_svc: svc_entry mov r2, sp @ regs pabt_helper @ @ IRQs off again before pulling preserved data off the stack @ disable_irq_notrace svc_exit r5 @ return from exception UNWIND(.fnend ) ENDPROC(__pabt_svc) Loading
arch/arm/kernel/entry-header.S +6 −0 Original line number Diff line number Diff line Loading @@ -76,12 +76,15 @@ #ifndef CONFIG_THUMB2_KERNEL .macro svc_exit, rpsr, irq = 0 .if \irq != 0 @ IRQs already off #ifdef CONFIG_TRACE_IRQFLAGS @ The parent context IRQs must have been enabled to get here in @ the first place, so there's no point checking the PSR I bit. bl trace_hardirqs_on #endif .else @ IRQs off again before pulling preserved data off the stack disable_irq_notrace #ifdef CONFIG_TRACE_IRQFLAGS tst \rpsr, #PSR_I_BIT bleq trace_hardirqs_on Loading Loading @@ -136,12 +139,15 @@ #else /* CONFIG_THUMB2_KERNEL */ .macro svc_exit, rpsr, irq = 0 .if \irq != 0 @ IRQs already off #ifdef CONFIG_TRACE_IRQFLAGS @ The parent context IRQs must have been enabled to get here in @ the first place, so there's no point checking the PSR I bit. bl trace_hardirqs_on #endif .else @ IRQs off again before pulling preserved data off the stack disable_irq_notrace #ifdef CONFIG_TRACE_IRQFLAGS tst \rpsr, #PSR_I_BIT bleq trace_hardirqs_on Loading