Commit f89f4490 authored by Krzysztof Hałasa's avatar Krzysztof Hałasa
Browse files

IXP4xx: move Coyote platform macros to the platform code. 



Signed-off-by: default avatarKrzysztof Hałasa <khc@pm.waw.pl>
parent ec669696

arch/arm/mach-ixp4xx/coyote-pci.c

+10 −2
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@@ -18,13 +18,21 @@ 
#include <linux/pci.h>

#include <linux/init.h>

#include <linux/irq.h>



#include <asm/mach-types.h>

#include <mach/hardware.h>

#include <asm/irq.h>



#include <asm/mach/pci.h>



#define COYOTE_PCI_SLOT0_DEVID	14

#define COYOTE_PCI_SLOT1_DEVID	15



/* PCI controller GPIO to IRQ pin mappings */

#define COYOTE_PCI_SLOT0_PIN	6

#define COYOTE_PCI_SLOT1_PIN	11



#define IRQ_COYOTE_PCI_SLOT0	IRQ_IXP4XX_GPIO6

#define IRQ_COYOTE_PCI_SLOT1	IRQ_IXP4XX_GPIO11



void __init coyote_pci_preinit(void)

{

	set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQ_TYPE_LEVEL_LOW);

arch/arm/mach-ixp4xx/coyote-setup.c

+9 −0
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@@ -25,6 +25,15 @@ 
#include <asm/mach/arch.h>

#include <asm/mach/flash.h>



#define COYOTE_IDE_BASE_PHYS	IXP4XX_EXP_BUS_BASE(3)

#define COYOTE_IDE_BASE_VIRT	0xFFFE1000

#define COYOTE_IDE_REGION_SIZE	0x1000



#define COYOTE_IDE_DATA_PORT	0xFFFE10E0

#define COYOTE_IDE_CTRL_PORT	0xFFFE10FC

#define COYOTE_IDE_ERROR_PORT	0xFFFE10E2

#define IRQ_COYOTE_IDE		IRQ_IXP4XX_GPIO5



static struct flash_platform_data coyote_flash_data = {

	.map_name	= "cfi_probe",

	.width		= 2,

arch/arm/mach-ixp4xx/include/mach/coyote.h

deleted100644 → 0
+0 −33
Original line number Diff line number Diff line 
/*

 * arch/arm/mach-ixp4xx/include/mach/coyote.h

 *

 * ADI Engineering platform specific definitions

 *

 * Author: Deepak Saxena <dsaxena@plexity.net>

 *

 * Copyright 2004 (c) MontaVista, Software, Inc. 

 * 

 * This file is licensed under  the terms of the GNU General Public 

 * License version 2. This program is licensed "as is" without any 

 * warranty of any kind, whether express or implied.

 */



#ifndef __ASM_ARCH_HARDWARE_H__

#error "Do not include this directly, instead #include <mach/hardware.h>"

#endif



/* PCI controller GPIO to IRQ pin mappings */

#define	COYOTE_PCI_SLOT0_PIN	6

#define	COYOTE_PCI_SLOT1_PIN	11



#define	COYOTE_PCI_SLOT0_DEVID	14

#define	COYOTE_PCI_SLOT1_DEVID	15



#define	COYOTE_IDE_BASE_PHYS	IXP4XX_EXP_BUS_BASE(3)

#define	COYOTE_IDE_BASE_VIRT	0xFFFE1000

#define	COYOTE_IDE_REGION_SIZE	0x1000



#define	COYOTE_IDE_DATA_PORT	0xFFFE10E0

#define	COYOTE_IDE_CTRL_PORT	0xFFFE10FC

#define	COYOTE_IDE_ERROR_PORT	0xFFFE10E2

arch/arm/mach-ixp4xx/include/mach/hardware.h

+0 −1
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@@ -44,7 +44,6 @@ 
#include "platform.h"



/* Platform specific details */

#include "coyote.h"

#include "prpmc1100.h"

#include "nslu2.h"

#include "nas100d.h"

arch/arm/mach-ixp4xx/include/mach/irqs.h

+0 −7
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@@ -78,13 +78,6 @@ 
#define	IRQ_PRPMC1100_PCI_INTC	IRQ_IXP4XX_GPIO9

#define	IRQ_PRPMC1100_PCI_INTD	IRQ_IXP4XX_GPIO8



/*

 * ADI Coyote Board IRQs

 */

#define	IRQ_COYOTE_PCI_SLOT0	IRQ_IXP4XX_GPIO6

#define	IRQ_COYOTE_PCI_SLOT1	IRQ_IXP4XX_GPIO11

#define	IRQ_COYOTE_IDE		IRQ_IXP4XX_GPIO5



/*

 * NSLU2 board IRQs

 */