Commit f883675b authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'gpio-fixes-for-v6.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux 

Pull gpio fixes from Bartosz Golaszewski:

 - fix a potential race condition and always set GPIOs used as interrupt
   source to input in gpio-mxc

 - fix a GPIO ACPI-related issue with system suspend on Clevo NL5xRU

* tag 'gpio-fixes-for-v6.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
  gpiolib: acpi: Add a ignore wakeup quirk for Clevo NL5xRU
  gpiolib: acpi: Allow ignoring wake capability on pins that aren't in _AEI
  gpio: mxc: Always set GPIOs used as interrupt source to INPUT mode
  gpio: mxc: Protect GPIO irqchip RMW with bgpio spinlock
parents 4e31bada 4cb78618

drivers/gpio/gpio-mxc.c

+12 −1
Original line number Original line Diff line number Diff line
@@ -18,6 +18,7 @@ 
#include <linux/module.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/platform_device.h>

#include <linux/slab.h>

#include <linux/slab.h>

#include <linux/spinlock.h>

#include <linux/syscore_ops.h>

#include <linux/syscore_ops.h>

#include <linux/gpio/driver.h>

#include <linux/gpio/driver.h>

#include <linux/of.h>

#include <linux/of.h>
@@ -159,6 +160,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) 
{

{

	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);

	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);

	struct mxc_gpio_port *port = gc->private;

	struct mxc_gpio_port *port = gc->private;

	unsigned long flags;

	u32 bit, val;

	u32 bit, val;

	u32 gpio_idx = d->hwirq;

	u32 gpio_idx = d->hwirq;

	int edge;

	int edge;
@@ -197,6 +199,8 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) 
		return -EINVAL;

		return -EINVAL;

	}

	}





	raw_spin_lock_irqsave(&port->gc.bgpio_lock, flags);



	if (GPIO_EDGE_SEL >= 0) {

	if (GPIO_EDGE_SEL >= 0) {

		val = readl(port->base + GPIO_EDGE_SEL);

		val = readl(port->base + GPIO_EDGE_SEL);

		if (edge == GPIO_INT_BOTH_EDGES)

		if (edge == GPIO_INT_BOTH_EDGES)
@@ -217,15 +221,20 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) 
	writel(1 << gpio_idx, port->base + GPIO_ISR);

	writel(1 << gpio_idx, port->base + GPIO_ISR);

	port->pad_type[gpio_idx] = type;

	port->pad_type[gpio_idx] = type;





	return 0;

	raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags);



	return port->gc.direction_input(&port->gc, gpio_idx);

}

}





static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)

static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)

{

{

	void __iomem *reg = port->base;

	void __iomem *reg = port->base;

	unsigned long flags;

	u32 bit, val;

	u32 bit, val;

	int edge;

	int edge;





	raw_spin_lock_irqsave(&port->gc.bgpio_lock, flags);



	reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */

	reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */

	bit = gpio & 0xf;

	bit = gpio & 0xf;

	val = readl(reg);

	val = readl(reg);
@@ -243,6 +252,8 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) 
		return;

		return;

	}

	}

	writel(val | (edge << (bit << 1)), reg);

	writel(val | (edge << (bit << 1)), reg);



	raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags);

}

}





/* handle 32 interrupts in one status register */

/* handle 32 interrupts in one status register */

drivers/gpio/gpiolib-acpi.c

+15 −2
Original line number Original line Diff line number Diff line
@@ -385,7 +385,7 @@ static bool acpi_gpio_in_ignore_list(const char *ignore_list, const char *contro 
}

}





static bool acpi_gpio_irq_is_wake(struct device *parent,

static bool acpi_gpio_irq_is_wake(struct device *parent,

				  struct acpi_resource_gpio *agpio)

				  const struct acpi_resource_gpio *agpio)

{

{

	unsigned int pin = agpio->pin_table[0];

	unsigned int pin = agpio->pin_table[0];
@@ -778,7 +778,7 @@ static int acpi_populate_gpio_lookup(struct acpi_resource *ares, void *data) 
		lookup->info.pin_config = agpio->pin_config;

		lookup->info.pin_config = agpio->pin_config;

		lookup->info.debounce = agpio->debounce_timeout;

		lookup->info.debounce = agpio->debounce_timeout;

		lookup->info.gpioint = gpioint;

		lookup->info.gpioint = gpioint;

		lookup->info.wake_capable = agpio->wake_capable == ACPI_WAKE_CAPABLE;

		lookup->info.wake_capable = acpi_gpio_irq_is_wake(&lookup->info.adev->dev, agpio);





		/*

		/*

		 * Polarity and triggering are only specified for GpioInt

		 * Polarity and triggering are only specified for GpioInt
@@ -1623,6 +1623,19 @@ static const struct dmi_system_id gpiolib_acpi_quirks[] __initconst = { 
			.ignore_interrupt = "AMDI0030:00@18",

			.ignore_interrupt = "AMDI0030:00@18",

		},

		},

	},

	},

	{

		/*

		 * Spurious wakeups from TP_ATTN# pin

		 * Found in BIOS 1.7.8

		 * https://gitlab.freedesktop.org/drm/amd/-/issues/1722#note_1720627

		 */

		.matches = {

			DMI_MATCH(DMI_BOARD_NAME, "NL5xRU"),

		},

		.driver_data = &(struct acpi_gpiolib_dmi_quirk) {

			.ignore_wake = "ELAN0415:00@9",

		},

	},

	{} /* Terminating entry */

	{} /* Terminating entry */

};

};