Commit f87f6e5b authored by Chen Lin's avatar Chen Lin Committed by Will Deacon
Browse files

iommu/arm-smmu: Warn once when the perfetcher errata patch fails to apply 



Default reset value of secure banked register SMMU_sACR.cache_lock is 1.
If it is not been set to 0 by secure software(eg: atf), the non-secure
linux cannot clear ARM_MMU500_ACTLR_CPRE bit. In this situation,
the prefetcher errata is not applied successfully, warn once.

Signed-off-by: default avatarChen Lin <chen45464546@163.com>
Link: https://lore.kernel.org/r/20221103222121.3051-1-chen45464546@163.com


[will: Tweaked wording of diagnostic]
Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 9abf2313

drivers/iommu/arm/arm-smmu/arm-smmu-impl.c

+3 −0
Original line number Diff line number Diff line
@@ -136,6 +136,9 @@ int arm_mmu500_reset(struct arm_smmu_device *smmu) 
		reg = arm_smmu_cb_read(smmu, i, ARM_SMMU_CB_ACTLR);

		reg &= ~ARM_MMU500_ACTLR_CPRE;

		arm_smmu_cb_write(smmu, i, ARM_SMMU_CB_ACTLR, reg);

		reg = arm_smmu_cb_read(smmu, i, ARM_SMMU_CB_ACTLR);

		if (reg & ARM_MMU500_ACTLR_CPRE)

			dev_warn_once(smmu->dev, "Failed to disable prefetcher [errata #841119 and #826419], check ACR.CACHE_LOCK\n");

	}



	return 0;