Commit f870b930 authored by Xiangyou Xie's avatar Xiangyou Xie Committed by Jia Qingtong
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KVM: arm64: vgic-its: Do not execute invalidate MSI-LPI translation cache on movi command 

euleros inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I8UJ9Q



-------------------------------------------------

It is not necessary to invalidate the lpi translation cache when the
virtual machine executes the movi instruction to adjust the affinity of
the interrupt. Irqbalance will adjust the interrupt affinity in a short
period of time to achieve the purpose of interrupting load balancing,
but this does not affect the contents of the lpi translation cache.

Reviewed-by: default avatarHailiang Zhang <zhang.zhanghailiang@huawei.com>
Signed-off-by: default avatarXiangyou Xie <xiexiangyou@huawei.com>
Signed-off-by: default avatarYang Yingliang <yangyingliang@huawei.com>
Signed-off-by: default avatarChaochao Xing <xingchaochao@huawei.com>
Reviewed-by: default avatarXiangyou Xie <xiexiangyou@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
Signed-off-by: default avatarJia Qingtong <jiaqingtong@huawei.com>
parent 13539ee0

arch/arm64/kvm/vgic/vgic-its.c

+5 −0
Original line number Diff line number Diff line
@@ -1026,7 +1026,12 @@ static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its, 
	ite->collection = collection;

	vcpu = kvm_get_vcpu(kvm, collection->target_addr);



#ifdef CONFIG_KVM_ARM_MULTI_LPI_TRANSLATE_CACHE

	if (!vgic_lpis_enabled(vcpu))

		vgic_its_invalidate_cache(kvm);

#else

	vgic_its_invalidate_cache(kvm);

#endif



	return update_affinity(ite->irq, vcpu);

}