Commit f8391101 authored by Prike Liang's avatar Prike Liang Committed by Alex Deucher
Browse files

drm/amdgpu: fix S3 failed as RLC safe mode entry stucked in polloing gfx acq 



Fix gfx cgpg setting sequence for RLC deadlock at safe mode entry in polling gfx response.
The patch can fix VCN IB test failed and DAL get dispaly count failed issue.

Signed-off-by: default avatarPrike Liang <Prike.Liang@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c8486eef

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+0 −5
Original line number Diff line number Diff line
@@ -4287,9 +4287,6 @@ static void gfx_v9_0_update_gfx_cg_power_gating(struct amdgpu_device *adev, 
{

	amdgpu_gfx_rlc_enter_safe_mode(adev);



	if (is_support_sw_smu(adev) && !enable)

		smu_set_gfx_cgpg(&adev->smu, enable);



	if ((adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) && enable) {

		gfx_v9_0_enable_gfx_cg_power_gating(adev, true);

		if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PIPELINE)
@@ -4566,8 +4563,6 @@ static int gfx_v9_0_set_powergating_state(void *handle, 
			gfx_v9_0_enable_cp_power_gating(adev, false);



		/* update gfx cgpg state */

		if (is_support_sw_smu(adev) && enable)

			smu_set_gfx_cgpg(&adev->smu, enable);

		gfx_v9_0_update_gfx_cg_power_gating(adev, enable);



		/* update mgcg state */

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

+4 −0
Original line number Diff line number Diff line
@@ -1188,6 +1188,7 @@ static int smu_hw_init(void *handle) 
	if (adev->flags & AMD_IS_APU) {

		smu_powergate_sdma(&adev->smu, false);

		smu_powergate_vcn(&adev->smu, false);

		smu_set_gfx_cgpg(&adev->smu, true);

	}



	if (!smu->pm_enabled)
@@ -1350,6 +1351,9 @@ static int smu_resume(void *handle) 
	if (ret)

		goto failed;



	if (smu->is_apu)

		smu_set_gfx_cgpg(&adev->smu, true);



	mutex_unlock(&smu->mutex);



	pr_info("SMU is resumed successfully!\n");