Commit f81cc5ac authored by Filip Kokosinski's avatar Filip Kokosinski Committed by Stafford Horne
Browse files

openrisc: add support for LiteX 



This adds support for a basic LiteX-based SoC with a mor1kx soft CPU.

Signed-off-by: default avatarFilip Kokosinski <fkokosinski@antmicro.com>
Signed-off-by: default avatarMateusz Holenko <mholenko@antmicro.com>
[shorne: Merged in soc-cntl patch, removed CROSS_COMPILE, sort MAINT.]
Signed-off-by: default avatarStafford Horne <shorne@gmail.com>
parent 1da81e55

MAINTAINERS

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@@ -10177,6 +10177,7 @@ M: Karol Gugala <kgugala@antmicro.com> 
M:	Mateusz Holenko <mholenko@antmicro.com>

S:	Maintained

F:	Documentation/devicetree/bindings/*/litex,*.yaml

F:	arch/openrisc/boot/dts/or1klitex.dts

F:	drivers/soc/litex/litex_soc_ctrl.c

F:	drivers/tty/serial/liteuart.c

F:	include/linux/litex.h

arch/openrisc/boot/dts/or1klitex.dts

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// SPDX-License-Identifier: GPL-2.0

/*

 * LiteX-based System on Chip

 *

 * Copyright (C) 2019 Antmicro <www.antmicro.com>

 */



/dts-v1/;

/ {

	compatible = "opencores,or1ksim";

	#address-cells = <1>;

	#size-cells = <1>;

	interrupt-parent = <&pic>;



	aliases {

		serial0 = &serial0;

	};



	chosen {

		bootargs = "console=liteuart";

	};



	memory@0 {

		device_type = "memory";

		reg = <0x00000000 0x10000000>;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;

		cpu@0 {

			compatible = "opencores,or1200-rtlsvn481";

			reg = <0>;

			clock-frequency = <100000000>;

		};

	};



	pic: pic {

		compatible = "opencores,or1k-pic";

		#interrupt-cells = <1>;

		interrupt-controller;

	};



	serial0: serial@e0002000 {

		device_type = "serial";

		compatible = "litex,liteuart";

		reg = <0xe0002000 0x100>;

	};



	soc_ctrl0: soc_controller@e0000000 {

			compatible = "litex,soc-controller";

			reg = <0xe0000000 0xc>;

			status = "okay";

	};

};

arch/openrisc/configs/or1klitex_defconfig

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CONFIG_BLK_DEV_INITRD=y

CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y

CONFIG_BUG_ON_DATA_CORRUPTION=y

CONFIG_CC_OPTIMIZE_FOR_SIZE=y

CONFIG_DEVTMPFS=y

CONFIG_DEVTMPFS_MOUNT=y

CONFIG_EMBEDDED=y

CONFIG_HZ_100=y

CONFIG_INITRAMFS_SOURCE="openrisc-rootfs.cpio.gz"

CONFIG_OF_OVERLAY=y

CONFIG_OPENRISC_BUILTIN_DTB="or1klitex"

CONFIG_PANIC_ON_OOPS=y

CONFIG_PRINTK_TIME=y

CONFIG_LITEX_SOC_CONTROLLER=y

CONFIG_SERIAL_LITEUART=y

CONFIG_SERIAL_LITEUART_CONSOLE=y

CONFIG_SOFTLOCKUP_DETECTOR=y

CONFIG_TTY_PRINTK=y