Commit f7957e60 authored by Matthew Brost's avatar Matthew Brost Committed by John Harrison
Browse files

drm/i915/guc: Handle engine reset failure notification 



GuC will notify the driver, via G2H, if it fails to
reset an engine. We recover by resorting to a full GPU
reset.

v2:
 (John Harrison):
  - s/drm_dbg/drm_err

Signed-off-by: default avatarMatthew Brost <matthew.brost@intel.com>
Signed-off-by: default avatarFernando Pacheco <fernando.pacheco@intel.com>
Reviewed-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Signed-off-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210727002348.97202-14-matthew.brost@intel.com
parent 1e0fd2b5

drivers/gpu/drm/i915/gt/uc/intel_guc.h

+2 −0
Original line number Diff line number Diff line
@@ -271,6 +271,8 @@ int intel_guc_sched_done_process_msg(struct intel_guc *guc, 
				     const u32 *msg, u32 len);

int intel_guc_context_reset_process_msg(struct intel_guc *guc,

					const u32 *msg, u32 len);

int intel_guc_engine_failure_process_msg(struct intel_guc *guc,

					 const u32 *msg, u32 len);



void intel_guc_submission_reset_prepare(struct intel_guc *guc);

void intel_guc_submission_reset(struct intel_guc *guc, bool stalled);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

+3 −0
Original line number Diff line number Diff line
@@ -987,6 +987,9 @@ static int ct_process_request(struct intel_guc_ct *ct, struct ct_incoming_msg *r 
	case INTEL_GUC_ACTION_CONTEXT_RESET_NOTIFICATION:

		ret = intel_guc_context_reset_process_msg(guc, payload, len);

		break;

	case INTEL_GUC_ACTION_ENGINE_FAILURE_NOTIFICATION:

		ret = intel_guc_engine_failure_process_msg(guc, payload, len);

		break;

	default:

		ret = -EOPNOTSUPP;

		break;

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

+43 −0
Original line number Diff line number Diff line
@@ -2237,6 +2237,49 @@ int intel_guc_context_reset_process_msg(struct intel_guc *guc, 
	return 0;

}



static struct intel_engine_cs *

guc_lookup_engine(struct intel_guc *guc, u8 guc_class, u8 instance)

{

	struct intel_gt *gt = guc_to_gt(guc);

	u8 engine_class = guc_class_to_engine_class(guc_class);



	/* Class index is checked in class converter */

	GEM_BUG_ON(instance > MAX_ENGINE_INSTANCE);



	return gt->engine_class[engine_class][instance];

}



int intel_guc_engine_failure_process_msg(struct intel_guc *guc,

					 const u32 *msg, u32 len)

{

	struct intel_engine_cs *engine;

	u8 guc_class, instance;

	u32 reason;



	if (unlikely(len != 3)) {

		drm_err(&guc_to_gt(guc)->i915->drm, "Invalid length %u", len);

		return -EPROTO;

	}



	guc_class = msg[0];

	instance = msg[1];

	reason = msg[2];



	engine = guc_lookup_engine(guc, guc_class, instance);

	if (unlikely(!engine)) {

		drm_err(&guc_to_gt(guc)->i915->drm,

			"Invalid engine %d:%d", guc_class, instance);

		return -EPROTO;

	}



	intel_gt_handle_error(guc_to_gt(guc), engine->mask,

			      I915_ERROR_CAPTURE,

			      "GuC failed to reset %s (reason=0x%08x)\n",

			      engine->name, reason);



	return 0;

}



void intel_guc_submission_print_info(struct intel_guc *guc,

				     struct drm_printer *p)

{