Commit f750255f authored by Mark Rutland's avatar Mark Rutland Committed by Will Deacon
Browse files

arm64: insn: always inline hint generation 



All users of aarch64_insn_gen_hint() (e.g. aarch64_insn_gen_nop()) pass
a constant argument and generate a constant value. Some of those users
are noinstr code (e.g. for alternatives patching).

For noinstr code it is necessary to either inline these functions or to
ensure the out-of-line versions are noinstr.

Since in all cases these are generating a constant, make them
__always_inline.

There should be no functional change as a result of this patch.

Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Joey Gouly <joey.gouly@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: default avatarJoey Gouly <joey.gouly@arm.com>
Link: https://lore.kernel.org/r/20221114135928.3000571-5-mark.rutland@arm.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 4488f90c

arch/arm64/include/asm/insn.h

+12 −2
Original line number Diff line number Diff line
@@ -552,8 +552,18 @@ u32 aarch64_insn_gen_comp_branch_imm(unsigned long pc, unsigned long addr, 
				     enum aarch64_insn_branch_type type);

u32 aarch64_insn_gen_cond_branch_imm(unsigned long pc, unsigned long addr,

				     enum aarch64_insn_condition cond);

u32 aarch64_insn_gen_hint(enum aarch64_insn_hint_cr_op op);

u32 aarch64_insn_gen_nop(void);



static __always_inline u32

aarch64_insn_gen_hint(enum aarch64_insn_hint_cr_op op)

{

	return aarch64_insn_get_hint_value() | op;

}



static __always_inline u32 aarch64_insn_gen_nop(void)

{

	return aarch64_insn_gen_hint(AARCH64_INSN_HINT_NOP);

}



u32 aarch64_insn_gen_branch_reg(enum aarch64_insn_register reg,

				enum aarch64_insn_branch_type type);

u32 aarch64_insn_gen_load_store_reg(enum aarch64_insn_register reg,

arch/arm64/lib/insn.c

+0 −10
Original line number Diff line number Diff line
@@ -350,16 +350,6 @@ u32 aarch64_insn_gen_cond_branch_imm(unsigned long pc, unsigned long addr, 
					     offset >> 2);

}



u32 __kprobes aarch64_insn_gen_hint(enum aarch64_insn_hint_cr_op op)

{

	return aarch64_insn_get_hint_value() | op;

}



u32 __kprobes aarch64_insn_gen_nop(void)

{

	return aarch64_insn_gen_hint(AARCH64_INSN_HINT_NOP);

}



u32 aarch64_insn_gen_branch_reg(enum aarch64_insn_register reg,

				enum aarch64_insn_branch_type type)

{