RDMA/hns: Fix wrong timer context buffer page size

mainline inclusion
from mainline-v5.12-rc1
commit 5e6370d7
category: bugfix
bugzilla: 174002
CVE:NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=5e6370d7cc75134b0eb5b15916aab40b628db9e1

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    The HEM page size for QPC timer and CQC timer is always 4K and there's no
    need to calculate a different size by the hns driver, otherwise the ROCEE
    may access an invalid address.

    Fixes: 719d1341 ("RDMA/hns: Remove duplicated hem page size config code")
    Link: https://lore.kernel.org/r/1621589395-2435-4-git-send-email-liweihang@huawei.com


    Signed-off-by: Xi Wang <wangxi11@huawei.com>
    Signed-off-by: Weihang Li <liweihang@huawei.com>
    Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

Reviewed-by: ChunZhi Hu <huchunzhi@huawei.com>

Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com>