Commit f734409c authored by Wojciech Ziemba's avatar Wojciech Ziemba Committed by Herbert Xu
Browse files

crypto: qat - move and rename GEN4 error register definitions 



Move error source related CSRs from 4xxx to the wider GEN4 header file.

Signed-off-by: default avatarWojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: default avatarGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: default avatarMarco Chiappero <marco.chiappero@intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 605b84ae

drivers/crypto/qat/qat_4xxx/adf_4xxx_hw_data.c

+3 −3
Original line number Diff line number Diff line
@@ -229,7 +229,7 @@ static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) 
	void __iomem *csr = misc_bar->virt_addr;



	/* Enable all in errsou3 except VFLR notification on host */

	ADF_CSR_WR(csr, ADF_4XXX_ERRMSK3, ADF_4XXX_VFLNOTIFY);

	ADF_CSR_WR(csr, ADF_GEN4_ERRMSK3, ADF_GEN4_VFLNOTIFY);

}



static void adf_enable_ints(struct adf_accel_dev *accel_dev)
@@ -256,9 +256,9 @@ static int adf_init_device(struct adf_accel_dev *accel_dev) 
	addr = (&GET_BARS(accel_dev)[ADF_4XXX_PMISC_BAR])->virt_addr;



	/* Temporarily mask PM interrupt */

	csr = ADF_CSR_RD(addr, ADF_4XXX_ERRMSK2);

	csr = ADF_CSR_RD(addr, ADF_GEN4_ERRMSK2);

	csr |= ADF_4XXX_PM_SOU;

	ADF_CSR_WR(addr, ADF_4XXX_ERRMSK2, csr);

	ADF_CSR_WR(addr, ADF_GEN4_ERRMSK2, csr);



	/* Set DRV_ACTIVE bit to power up the device */

	ADF_CSR_WR(addr, ADF_4XXX_PM_INTERRUPT, ADF_4XXX_PM_DRV_ACTIVE);

drivers/crypto/qat/qat_4xxx/adf_4xxx_hw_data.h

+0 −14
Original line number Diff line number Diff line
@@ -39,20 +39,6 @@ 
#define ADF_4XXX_NUM_RINGS_PER_BANK	2

#define ADF_4XXX_NUM_BANKS_PER_VF	4



/* Error source registers */

#define ADF_4XXX_ERRSOU0	(0x41A200)

#define ADF_4XXX_ERRSOU1	(0x41A204)

#define ADF_4XXX_ERRSOU2	(0x41A208)

#define ADF_4XXX_ERRSOU3	(0x41A20C)



/* Error source mask registers */

#define ADF_4XXX_ERRMSK0	(0x41A210)

#define ADF_4XXX_ERRMSK1	(0x41A214)

#define ADF_4XXX_ERRMSK2	(0x41A218)

#define ADF_4XXX_ERRMSK3	(0x41A21C)



#define ADF_4XXX_VFLNOTIFY	BIT(7)



/* Arbiter configuration */

#define ADF_4XXX_ARB_CONFIG			(BIT(31) | BIT(6) | BIT(0))

#define ADF_4XXX_ARB_OFFSET			(0x0)

drivers/crypto/qat/qat_common/adf_gen4_hw_data.h

+14 −0
Original line number Diff line number Diff line
@@ -122,6 +122,20 @@ do { \ 
#define ADF_WQM_CSR_RPRESETSTS_STATUS	BIT(0)

#define ADF_WQM_CSR_RPRESETSTS(bank)	(ADF_WQM_CSR_RPRESETCTL(bank) + 4)



/* Error source registers */

#define ADF_GEN4_ERRSOU0	(0x41A200)

#define ADF_GEN4_ERRSOU1	(0x41A204)

#define ADF_GEN4_ERRSOU2	(0x41A208)

#define ADF_GEN4_ERRSOU3	(0x41A20C)



/* Error source mask registers */

#define ADF_GEN4_ERRMSK0	(0x41A210)

#define ADF_GEN4_ERRMSK1	(0x41A214)

#define ADF_GEN4_ERRMSK2	(0x41A218)

#define ADF_GEN4_ERRMSK3	(0x41A21C)



#define ADF_GEN4_VFLNOTIFY	BIT(7)



void adf_gen4_set_ssm_wdtimer(struct adf_accel_dev *accel_dev);

void adf_gen4_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops);

int adf_gen4_ring_pair_reset(struct adf_accel_dev *accel_dev, u32 bank_number);