Unverified Commit f6c675fd authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!13970 LoongArch: fix AVEC related issue 

Merge Pull Request from: @ci-robot 
 
PR sync from: Hongchen Zhang <zhanghongchen@loongson.cn>
https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/JLB2AZSYGIEUU4XLIY7M2Y7V7EWLX7S3/ 
Juxin Gao (1):
  drivers/irqchip: Disable pci_irq_limit when using AVEC interrupt
    controller

Tianyang Zhang (1):
  irqchip/avec: Support AVEC for 3C6000 multi-node machine


-- 
2.33.0
 
https://gitee.com/openeuler/kernel/issues/IB8166 
 
Link:https://gitee.com/openeuler/kernel/pulls/13970

 

Reviewed-by: default avatarJuxin Gao <gaojuxin@loongson.cn>
Signed-off-by: default avatarZhang Peng <zhangpeng362@huawei.com>
parents 40ccfff9 7c079007

arch/loongarch/include/asm/setup.h

+1 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 


#define VECSIZE 0x200



extern bool disable_pci_irq_limit;

extern unsigned long eentry;

extern unsigned long tlbrentry;

extern char init_command_line[COMMAND_LINE_SIZE];

drivers/irqchip/irq-loongarch-avec.c

+9 −2
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ struct pending_list { 
	struct list_head	head;

};



bool disable_pci_irq_limit;

static struct cpumask intersect_mask;

static DEFINE_PER_CPU(struct pending_list, pending_list);

#endif
@@ -83,7 +84,7 @@ static void avecintc_sync(struct avecintc_data *adata) 
		plist = per_cpu_ptr(&pending_list, adata->prev_cpu);

		list_add_tail(&adata->entry, &plist->head);

		adata->moving = 1;

		smp_ops.send_ipi_single(adata->prev_cpu, SMP_CLEAR_VECTOR);

		smp_ops.send_ipi_single(adata->prev_cpu, ACTION_CLEAR_VECTOR);

	}

}
@@ -132,6 +133,7 @@ static int avecintc_set_affinity(struct irq_data *data, const struct cpumask *de 


static int avecintc_cpu_online(unsigned int cpu)

{

	long value;

	if (!loongarch_avec.vector_matrix)

		return 0;
@@ -141,6 +143,10 @@ static int avecintc_cpu_online(unsigned int cpu) 


	pending_list_init(cpu);



	value = iocsr_read64(LOONGARCH_IOCSR_MISC_FUNC);

	value |= IOCSR_MISC_FUNC_AVEC_EN;

	iocsr_write64(value, LOONGARCH_IOCSR_MISC_FUNC);



	raw_spin_unlock(&loongarch_avec.lock);



	return 0;
@@ -193,7 +199,7 @@ void complete_irq_moving(void) 
		}



		if (isr & (1UL << (vector % VECTORS_PER_REG))) {

			smp_ops.send_ipi_single(cpu, SMP_CLEAR_VECTOR);

			smp_ops.send_ipi_single(cpu, ACTION_CLEAR_VECTOR);

			continue;

		}

		list_del(&adata->entry);
@@ -367,6 +373,7 @@ static int __init avecintc_init(struct irq_domain *parent) 
	int ret, parent_irq;

	unsigned long value;



	disable_pci_irq_limit = true;

	raw_spin_lock_init(&loongarch_avec.lock);



	loongarch_avec.fwnode = irq_domain_alloc_named_fwnode("AVECINTC");

drivers/pci/msi/msi.c

+12 −6
Original line number Diff line number Diff line
@@ -421,6 +421,8 @@ static int msi_capability_init(struct pci_dev *dev, int nvec, 
}



#ifdef CONFIG_LOONGARCH

#include <asm/setup.h>



static unsigned int pci_irq_numbers = 32;



static int __init pci_irq_limit(char *str)
@@ -442,10 +444,12 @@ int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, 
	int rc;



#ifdef CONFIG_LOONGARCH

	if (!disable_pci_irq_limit) {

		if (maxvec > 32) {

			maxvec = pci_irq_numbers;

			minvec = min_t(int, pci_irq_numbers, minvec);

		}

	}

#endif



	if (!pci_msi_supported(dev, minvec) || dev->current_state != PCI_D0)
@@ -838,10 +842,12 @@ int __pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int 
	int hwsize, rc, nvec = maxvec;



#ifdef CONFIG_LOONGARCH

	if (!disable_pci_irq_limit) {

		if (maxvec > 32) {

			nvec = pci_irq_numbers;

			minvec = min_t(int, pci_irq_numbers, minvec);

		}

	}

#endif



	if (maxvec < minvec)