Commit f6b83a8c authored by Tianli Xiong's avatar Tianli Xiong Committed by Hongchen Zhang
Browse files

irqchip/loongson-liointc: Set different isr for differnt core 

LoongArch inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I6BWFP



--------------------------------

Signed-off-by: default avatarTianli Xiong <xiongtianli@loongson.cn>
parent d379ed4d

drivers/irqchip/irq-loongson-liointc.c

+2 −2
Original line number Diff line number Diff line
@@ -28,7 +28,7 @@ 


#define LIOINTC_INTC_CHIP_START	0x20



#define LIOINTC_REG_INTC_STATUS	(LIOINTC_INTC_CHIP_START + 0x20)

#define LIOINTC_REG_INTC_STATUS(cpuid)	(LIOINTC_INTC_CHIP_START + 0x20 + (cpuid) * 8)

#define LIOINTC_REG_INTC_EN_STATUS	(LIOINTC_INTC_CHIP_START + 0x04)

#define LIOINTC_REG_INTC_ENABLE	(LIOINTC_INTC_CHIP_START + 0x08)

#define LIOINTC_REG_INTC_DISABLE	(LIOINTC_INTC_CHIP_START + 0x0c)
@@ -217,7 +217,7 @@ static int liointc_init(phys_addr_t addr, unsigned long size, int revision, 
		goto out_free_priv;



	for (i = 0; i < LIOINTC_NUM_CORES; i++)

		priv->core_isr[i] = base + LIOINTC_REG_INTC_STATUS;

		priv->core_isr[i] = base + LIOINTC_REG_INTC_STATUS(i);



	for (i = 0; i < LIOINTC_NUM_PARENT; i++)

		priv->handler[i].parent_int_map = parent_int_map[i];