Commit f6723b84 authored by Rahul T R's avatar Rahul T R Committed by Vinod Koul
Browse files

phy: cdns-dphy: Add support for DPHY TX on J721e 



Add support new compatible for dphy-tx on j721e
and implement dphy ops required.

Signed-off-by: default avatarRahul T R <r-ravikumar@ti.com>
Reviewed-by: default avatarPratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220623125433.18467-4-r-ravikumar@ti.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent efcd5f52

drivers/phy/cadence/cdns-dphy.c

+61 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#include <linux/bitops.h>

#include <linux/clk.h>

#include <linux/io.h>

#include <linux/iopoll.h>

#include <linux/module.h>

#include <linux/of_address.h>

#include <linux/of_device.h>
@@ -18,6 +19,7 @@ 


#define REG_WAKEUP_TIME_NS		800

#define DPHY_PLL_RATE_HZ		108000000

#define POLL_TIMEOUT_US			1000



/* DPHY registers */

#define DPHY_PMA_CMN(reg)		(reg)
@@ -62,6 +64,18 @@ 
#define DSI_NULL_FRAME_OVERHEAD		6

#define DSI_EOT_PKT_SIZE		4



#define DPHY_TX_J721E_WIZ_PLL_CTRL	0xF04

#define DPHY_TX_J721E_WIZ_STATUS	0xF08

#define DPHY_TX_J721E_WIZ_RST_CTRL	0xF0C

#define DPHY_TX_J721E_WIZ_PSM_FREQ	0xF10



#define DPHY_TX_J721E_WIZ_IPDIV		GENMASK(4, 0)

#define DPHY_TX_J721E_WIZ_OPDIV		GENMASK(13, 8)

#define DPHY_TX_J721E_WIZ_FBDIV		GENMASK(25, 16)

#define DPHY_TX_J721E_WIZ_LANE_RSTB	BIT(31)

#define DPHY_TX_WIZ_PLL_LOCK		BIT(31)

#define DPHY_TX_WIZ_O_CMN_READY		BIT(31)



struct cdns_dphy_cfg {

	u8 pll_ipdiv;

	u8 pll_opdiv;
@@ -210,6 +224,46 @@ static void cdns_dphy_ref_set_psm_div(struct cdns_dphy *dphy, u8 div) 
	       dphy->regs + DPHY_PSM_CFG);

}



static unsigned long cdns_dphy_j721e_get_wakeup_time_ns(struct cdns_dphy *dphy)

{

	/* Minimum wakeup time as per MIPI D-PHY spec v1.2 */

	return 1000000;

}



static void cdns_dphy_j721e_set_pll_cfg(struct cdns_dphy *dphy,

					const struct cdns_dphy_cfg *cfg)

{

	u32 status;



	/*

	 * set the PWM and PLL Byteclk divider settings to recommended values

	 * which is same as that of in ref ops

	 */

	writel(DPHY_CMN_PWM_HIGH(6) | DPHY_CMN_PWM_LOW(0x101) |

	       DPHY_CMN_PWM_DIV(0x8),

	       dphy->regs + DPHY_CMN_PWM);



	writel((FIELD_PREP(DPHY_TX_J721E_WIZ_IPDIV, cfg->pll_ipdiv) |

		FIELD_PREP(DPHY_TX_J721E_WIZ_OPDIV, cfg->pll_opdiv) |

		FIELD_PREP(DPHY_TX_J721E_WIZ_FBDIV, cfg->pll_fbdiv)),

		dphy->regs + DPHY_TX_J721E_WIZ_PLL_CTRL);



	writel(DPHY_TX_J721E_WIZ_LANE_RSTB,

	       dphy->regs + DPHY_TX_J721E_WIZ_RST_CTRL);



	readl_poll_timeout(dphy->regs + DPHY_TX_J721E_WIZ_PLL_CTRL, status,

			   (status & DPHY_TX_WIZ_PLL_LOCK), 0, POLL_TIMEOUT_US);



	readl_poll_timeout(dphy->regs + DPHY_TX_J721E_WIZ_STATUS, status,

			   (status & DPHY_TX_WIZ_O_CMN_READY), 0,

			   POLL_TIMEOUT_US);

}



static void cdns_dphy_j721e_set_psm_div(struct cdns_dphy *dphy, u8 div)

{

	writel(div, dphy->regs + DPHY_TX_J721E_WIZ_PSM_FREQ);

}



/*

 * This is the reference implementation of DPHY hooks. Specific integration of

 * this IP may have to re-implement some of them depending on how they decided
@@ -221,6 +275,12 @@ static const struct cdns_dphy_ops ref_dphy_ops = { 
	.set_psm_div = cdns_dphy_ref_set_psm_div,

};



static const struct cdns_dphy_ops j721e_dphy_ops = {

	.get_wakeup_time_ns = cdns_dphy_j721e_get_wakeup_time_ns,

	.set_pll_cfg = cdns_dphy_j721e_set_pll_cfg,

	.set_psm_div = cdns_dphy_j721e_set_psm_div,

};



static int cdns_dphy_config_from_opts(struct phy *phy,

				      struct phy_configure_opts_mipi_dphy *opts,

				      struct cdns_dphy_cfg *cfg)
@@ -408,6 +468,7 @@ static int cdns_dphy_remove(struct platform_device *pdev) 


static const struct of_device_id cdns_dphy_of_match[] = {

	{ .compatible = "cdns,dphy", .data = &ref_dphy_ops },

	{ .compatible = "ti,j721e-dphy", .data = &j721e_dphy_ops },

	{ /* sentinel */ },

};

MODULE_DEVICE_TABLE(of, cdns_dphy_of_match);