Commit f628a34a authored by Sean Christopherson's avatar Sean Christopherson Committed by Paolo Bonzini
Browse files

KVM: SVM: Replace "avic_mode" enum with "x2avic_enabled" boolean 



Replace the "avic_mode" enum with a single bool to track whether or not
x2AVIC is enabled.  KVM already has "apicv_enabled" that tracks if any
flavor of AVIC is enabled, i.e. AVIC_MODE_NONE and AVIC_MODE_X1 are
redundant and unnecessary noise.

No functional change intended.

Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
Reviewed-by: default avatarMaxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20230106011306.85230-12-seanjc@google.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 2008fab3

arch/x86/kvm/svm/avic.c

+21 −25
Original line number Diff line number Diff line
@@ -53,7 +53,7 @@ static DEFINE_HASHTABLE(svm_vm_data_hash, SVM_VM_DATA_HASH_BITS); 
static u32 next_vm_id = 0;

static bool next_vm_id_wrapped = 0;

static DEFINE_SPINLOCK(svm_vm_data_hash_lock);

enum avic_modes avic_mode;

bool x2avic_enabled;



/*

 * This is a wrapper of struct amd_iommu_ir_data.
@@ -79,8 +79,7 @@ static void avic_activate_vmcb(struct vcpu_svm *svm) 
	 * (deletes the memslot) if any vCPU has x2APIC enabled, thus enabling

	 * AVIC in hybrid mode activates only the doorbell mechanism.

	 */

	if (apic_x2apic_mode(svm->vcpu.arch.apic) &&

	    avic_mode == AVIC_MODE_X2) {

	if (x2avic_enabled && apic_x2apic_mode(svm->vcpu.arch.apic)) {

		vmcb->control.int_ctl |= X2APIC_MODE_MASK;

		vmcb->control.avic_physical_id |= X2AVIC_MAX_PHYSICAL_ID;

		/* Disabling MSR intercept for x2APIC registers */
@@ -247,8 +246,8 @@ static u64 *avic_get_physical_id_entry(struct kvm_vcpu *vcpu, 
	u64 *avic_physical_id_table;

	struct kvm_svm *kvm_svm = to_kvm_svm(vcpu->kvm);



	if ((avic_mode == AVIC_MODE_X1 && index > AVIC_MAX_PHYSICAL_ID) ||

	    (avic_mode == AVIC_MODE_X2 && index > X2AVIC_MAX_PHYSICAL_ID))

	if ((!x2avic_enabled && index > AVIC_MAX_PHYSICAL_ID) ||

	    (index > X2AVIC_MAX_PHYSICAL_ID))

		return NULL;



	avic_physical_id_table = page_address(kvm_svm->avic_physical_id_table_page);
@@ -262,8 +261,8 @@ static int avic_init_backing_page(struct kvm_vcpu *vcpu) 
	int id = vcpu->vcpu_id;

	struct vcpu_svm *svm = to_svm(vcpu);



	if ((avic_mode == AVIC_MODE_X1 && id > AVIC_MAX_PHYSICAL_ID) ||

	    (avic_mode == AVIC_MODE_X2 && id > X2AVIC_MAX_PHYSICAL_ID))

	if ((!x2avic_enabled && id > AVIC_MAX_PHYSICAL_ID) ||

	    (id > X2AVIC_MAX_PHYSICAL_ID))

		return -EINVAL;



	if (!vcpu->arch.apic->regs)
@@ -1066,10 +1065,7 @@ void avic_refresh_virtual_apic_mode(struct kvm_vcpu *vcpu) 
	struct vcpu_svm *svm = to_svm(vcpu);

	struct vmcb *vmcb = svm->vmcb01.ptr;



	if (!lapic_in_kernel(vcpu) || avic_mode == AVIC_MODE_NONE)

		return;



	if (!enable_apicv)

	if (!lapic_in_kernel(vcpu) || !enable_apicv)

		return;



	if (kvm_vcpu_apicv_active(vcpu)) {
@@ -1145,32 +1141,32 @@ bool avic_hardware_setup(struct kvm_x86_ops *x86_ops) 
	if (!npt_enabled)

		return false;



	/* AVIC is a prerequisite for x2AVIC. */

	if (!boot_cpu_has(X86_FEATURE_AVIC) && !force_avic) {

		if (boot_cpu_has(X86_FEATURE_X2AVIC)) {

			pr_warn(FW_BUG "Cannot support x2AVIC due to AVIC is disabled");

			pr_warn(FW_BUG "Try enable AVIC using force_avic option");

		}

		return false;

	}



	if (boot_cpu_has(X86_FEATURE_AVIC)) {

		avic_mode = AVIC_MODE_X1;

		pr_info("AVIC enabled\n");

	} else if (force_avic) {

		/*

		 * Some older systems does not advertise AVIC support.

		 * See Revision Guide for specific AMD processor for more detail.

		 */

		avic_mode = AVIC_MODE_X1;

		pr_warn("AVIC is not supported in CPUID but force enabled");

		pr_warn("Your system might crash and burn");

	}



	/* AVIC is a prerequisite for x2AVIC. */

	if (boot_cpu_has(X86_FEATURE_X2AVIC)) {

		if (avic_mode == AVIC_MODE_X1) {

			avic_mode = AVIC_MODE_X2;

	x2avic_enabled = boot_cpu_has(X86_FEATURE_X2AVIC);

	if (x2avic_enabled)

		pr_info("x2AVIC enabled\n");

		} else {

			pr_warn(FW_BUG "Cannot support x2AVIC due to AVIC is disabled");

			pr_warn(FW_BUG "Try enable AVIC using force_avic option");

		}

	}



	if (avic_mode != AVIC_MODE_NONE)

	amd_iommu_register_ga_log_notifier(&avic_ga_log_notifier);



	return !!avic_mode;

	return true;

}

arch/x86/kvm/svm/svm.c

+2 −2
Original line number Diff line number Diff line
@@ -813,7 +813,7 @@ void svm_set_x2apic_msr_interception(struct vcpu_svm *svm, bool intercept) 
	if (intercept == svm->x2avic_msrs_intercepted)

		return;



	if (avic_mode != AVIC_MODE_X2 ||

	if (!x2avic_enabled ||

	    !apic_x2apic_mode(svm->vcpu.arch.apic))

		return;
@@ -5028,7 +5028,7 @@ static __init int svm_hardware_setup(void) 
		svm_x86_ops.vcpu_blocking = NULL;

		svm_x86_ops.vcpu_unblocking = NULL;

		svm_x86_ops.vcpu_get_apicv_inhibit_reasons = NULL;

	} else if (avic_mode == AVIC_MODE_X1) {

	} else if (!x2avic_enabled) {

		svm_x86_ops.allow_apicv_in_x2apic_without_x2apic_virtualization = true;

	}

arch/x86/kvm/svm/svm.h

+1 −8
Original line number Diff line number Diff line
@@ -35,14 +35,7 @@ extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly; 
extern bool npt_enabled;

extern int vgif;

extern bool intercept_smi;



enum avic_modes {

	AVIC_MODE_NONE = 0,

	AVIC_MODE_X1,

	AVIC_MODE_X2,

};



extern enum avic_modes avic_mode;

extern bool x2avic_enabled;



/*

 * Clean bits in VMCB.