Unverified Commit f61b9273 authored by Shengjiu Wang's avatar Shengjiu Wang Committed by Mark Brown
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ASoC: fsl_spdif: Add support for imx6sx platform 



The one difference on imx6sx platform is that the root clock
is shared with ASRC module, so we add a new flags
"shared_root_clock" which means the root clock is not independent,
then we will not do the clk_set_rate and clk_round_rate to avoid
impact ASRC module usage.

As add a new flags, we include the soc specific data struct.

Signed-off-by: default avatarShengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: default avatarNicolin Chen <nicoleotsuka@gmail.com>
Link: https://lore.kernel.org/r/7a343edd5f8487abad248a0b862f45fd95067751.1592376770.git.shengjiu.wang@nxp.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 632108af

sound/soc/fsl/fsl_spdif.c

+45 −5
Original line number Diff line number Diff line
@@ -42,6 +42,18 @@ static u8 srpc_dpll_locked[] = { 0x0, 0x1, 0x2, 0x3, 0x4, 0xa, 0xb }; 


#define DEFAULT_RXCLK_SRC	1



/**

 * struct fsl_spdif_soc_data: soc specific data

 *

 * @imx: for imx platform

 * @shared_root_clock: flag of sharing a clock source with others;

 *                     so the driver shouldn't set root clock rate

 */

struct fsl_spdif_soc_data {

	bool imx;

	bool shared_root_clock;

};



/*

 * SPDIF control structure

 * Defines channel status, subcode and Q sub
@@ -89,6 +101,7 @@ struct spdif_mixer_control { 
 * @dma_params_rx: DMA parameters for receive channel

 */

struct fsl_spdif_priv {

	const struct fsl_spdif_soc_data *soc;

	struct spdif_mixer_control fsl_spdif_control;

	struct snd_soc_dai_driver cpu_dai_drv;

	struct platform_device *pdev;
@@ -110,6 +123,27 @@ struct fsl_spdif_priv { 
	u32 regcache_srpc;

};



static struct fsl_spdif_soc_data fsl_spdif_vf610 = {

	.imx = false,

	.shared_root_clock = false,

};



static struct fsl_spdif_soc_data fsl_spdif_imx35 = {

	.imx = true,

	.shared_root_clock = false,

};



static struct fsl_spdif_soc_data fsl_spdif_imx6sx = {

	.imx = true,

	.shared_root_clock = true,

};



/* Check if clk is a root clock that does not share clock source with others */

static inline bool fsl_spdif_can_set_clk_rate(struct fsl_spdif_priv *spdif, int clk)

{

	return (clk == STC_TXCLK_SPDIF_ROOT) && !spdif->soc->shared_root_clock;

}



/* DPLL locked and lock loss interrupt handler */

static void spdif_irq_dpll_lock(struct fsl_spdif_priv *spdif_priv)

{
@@ -420,8 +454,7 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream, 


	sysclk_df = spdif_priv->sysclk_df[rate];



	/* Don't mess up the clocks from other modules */

	if (clk != STC_TXCLK_SPDIF_ROOT)

	if (!fsl_spdif_can_set_clk_rate(spdif_priv, clk))

		goto clk_set_bypass;



	/* The S/PDIF block needs a clock of 64 * fs * txclk_df */
@@ -1186,7 +1219,7 @@ static int fsl_spdif_probe_txclk(struct fsl_spdif_priv *spdif_priv, 
			continue;



		ret = fsl_spdif_txclk_caldiv(spdif_priv, clk, savesub, index,

					     i == STC_TXCLK_SPDIF_ROOT);

					     fsl_spdif_can_set_clk_rate(spdif_priv, i));

		if (savesub == ret)

			continue;
@@ -1230,6 +1263,12 @@ static int fsl_spdif_probe(struct platform_device *pdev) 


	spdif_priv->pdev = pdev;



	spdif_priv->soc = of_device_get_match_data(&pdev->dev);

	if (!spdif_priv->soc) {

		dev_err(&pdev->dev, "failed to get soc data\n");

		return -ENODEV;

	}



	/* Initialize this copy of the CPU DAI driver structure */

	memcpy(&spdif_priv->cpu_dai_drv, &fsl_spdif_dai, sizeof(fsl_spdif_dai));

	spdif_priv->cpu_dai_drv.name = dev_name(&pdev->dev);
@@ -1359,8 +1398,9 @@ static const struct dev_pm_ops fsl_spdif_pm = { 
};



static const struct of_device_id fsl_spdif_dt_ids[] = {

	{ .compatible = "fsl,imx35-spdif", },

	{ .compatible = "fsl,vf610-spdif", },

	{ .compatible = "fsl,imx35-spdif", .data = &fsl_spdif_imx35, },

	{ .compatible = "fsl,vf610-spdif", .data = &fsl_spdif_vf610, },

	{ .compatible = "fsl,imx6sx-spdif", .data = &fsl_spdif_imx6sx, },

	{}

};

MODULE_DEVICE_TABLE(of, fsl_spdif_dt_ids);