Merge back cpuidle material for 5.20. (f611b33a) · Commits · EulixOS / Software / Kernel

drivers/cpuidle/governors/haltpoll.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -19,6 +19,7 @@
		#include <linux/sched.h>
		#include <linux/module.h>
		#include <linux/kvm_para.h>
		#include <trace/events/power.h>

		static unsigned int guest_halt_poll_ns __read_mostly = 200000;
		module_param(guest_halt_poll_ns, uint, 0644);
		@@ -90,6 +91,7 @@ static void adjust_poll_limit(struct cpuidle_device *dev, u64 block_ns)
		if (val > guest_halt_poll_ns)
		val = guest_halt_poll_ns;

		trace_guest_halt_poll_ns_grow(val, dev->poll_limit_ns);
		dev->poll_limit_ns = val;
		} else if (block_ns > guest_halt_poll_ns &&
		guest_halt_poll_allow_shrink) {
		@@ -100,6 +102,7 @@ static void adjust_poll_limit(struct cpuidle_device *dev, u64 block_ns)
		val = 0;
		else
		val /= shrink;
		trace_guest_halt_poll_ns_shrink(val, dev->poll_limit_ns);
		dev->poll_limit_ns = val;
		}
		}

drivers/idle/intel_idle.c

+1 −23

Original line number	Diff line number	Diff line
		@@ -911,16 +911,6 @@ static struct cpuidle_state adl_l_cstates[] __initdata = {
		.enter = NULL }
		};

		/*
		* On Sapphire Rapids Xeon C1 has to be disabled if C1E is enabled, and vice
		* versa. On SPR C1E is enabled only if "C1E promotion" bit is set in
		* MSR_IA32_POWER_CTL. But in this case there effectively no C1, because C1
		* requests are promoted to C1E. If the "C1E promotion" bit is cleared, then
		* both C1 and C1E requests end up with C1, so there is effectively no C1E.
		*
		* By default we enable C1 and disable C1E by marking it with
		* 'CPUIDLE_FLAG_UNUSABLE'.
		*/
		static struct cpuidle_state spr_cstates[] __initdata = {
		{
		.name = "C1",
		@@ -933,8 +923,7 @@ static struct cpuidle_state spr_cstates[] __initdata = {
		{
		.name = "C1E",
		.desc = "MWAIT 0x01",
		.flags = MWAIT2flg(0x01) \| CPUIDLE_FLAG_ALWAYS_ENABLE \|
		CPUIDLE_FLAG_UNUSABLE,
		.flags = MWAIT2flg(0x01) \| CPUIDLE_FLAG_ALWAYS_ENABLE,
		.exit_latency = 2,
		.target_residency = 4,
		.enter = &intel_idle,
		@@ -1756,17 +1745,6 @@ static void __init spr_idle_state_table_update(void)
		{
		unsigned long long msr;

		/* Check if user prefers C1E over C1. */
		if ((preferred_states_mask & BIT(2)) &&
		!(preferred_states_mask & BIT(1))) {
		/* Disable C1 and enable C1E. */
		spr_cstates[0].flags \|= CPUIDLE_FLAG_UNUSABLE;
		spr_cstates[1].flags &= ~CPUIDLE_FLAG_UNUSABLE;

		/* Enable C1E using the "C1E promotion" bit. */
		c1e_promotion = C1E_PROMOTION_ENABLE;
		}

		/*
		* By default, the C6 state assumes the worst-case scenario of package
		* C6. However, if PC6 is disabled, we update the numbers to match

include/trace/events/power.h

+29 −0

Original line number	Diff line number	Diff line
		@@ -500,6 +500,35 @@ DEFINE_EVENT(dev_pm_qos_request, dev_pm_qos_remove_request,

		TP_ARGS(name, type, new_value)
		);

		TRACE_EVENT(guest_halt_poll_ns,

		TP_PROTO(bool grow, unsigned int new, unsigned int old),

		TP_ARGS(grow, new, old),

		TP_STRUCT__entry(
		__field(bool, grow)
		__field(unsigned int, new)
		__field(unsigned int, old)
		),

		TP_fast_assign(
		__entry->grow = grow;
		__entry->new = new;
		__entry->old = old;
		),

		TP_printk("halt_poll_ns %u (%s %u)",
		__entry->new,
		__entry->grow ? "grow" : "shrink",
		__entry->old)
		);

		#define trace_guest_halt_poll_ns_grow(new, old) \
		trace_guest_halt_poll_ns(true, new, old)
		#define trace_guest_halt_poll_ns_shrink(new, old) \
		trace_guest_halt_poll_ns(false, new, old)
		#endif /* _TRACE_POWER_H */

		/* This part must be outside protection */