Loading Documentation/devicetree/bindings/arm/lpc32xx-mic.txt 0 → 100644 +38 −0 Original line number Diff line number Diff line * NXP LPC32xx Main Interrupt Controller (MIC, including SIC1 and SIC2 secondary controllers) Required properties: - compatible: Should be "nxp,lpc3220-mic" - interrupt-controller: Identifies the node as an interrupt controller. - interrupt-parent: Empty for the interrupt controller itself - #interrupt-cells: The number of cells to define the interrupts. Should be 2. The first cell is the IRQ number The second cell is used to specify mode: 1 = low-to-high edge triggered 2 = high-to-low edge triggered 4 = active high level-sensitive 8 = active low level-sensitive Default for internal sources should be set to 4 (active high). - reg: Should contain MIC registers location and length Examples: /* * MIC */ mic: interrupt-controller@40008000 { compatible = "nxp,lpc3220-mic"; interrupt-controller; interrupt-parent; #interrupt-cells = <2>; reg = <0x40008000 0xC000>; }; /* * ADC */ adc@40048000 { compatible = "nxp,lpc3220-adc"; reg = <0x40048000 0x1000>; interrupt-parent = <&mic>; interrupts = <39 4>; }; Documentation/devicetree/bindings/arm/lpc32xx.txt 0 → 100644 +8 −0 Original line number Diff line number Diff line NXP LPC32xx Platforms Device Tree Bindings ------------------------------------------ Boards with the NXP LPC32xx SoC shall have the following properties: Required root node property: compatible: must be "nxp,lpc3220", "nxp,lpc3230", "nxp,lpc3240" or "nxp,lpc3250" arch/arm/Kconfig +1 −0 Original line number Diff line number Diff line Loading @@ -597,6 +597,7 @@ config ARCH_LPC32XX select USB_ARCH_HAS_OHCI select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select USE_OF help Support for the NXP LPC32XX family of processors Loading arch/arm/mach-lpc32xx/common.c +0 −192 Original line number Diff line number Diff line Loading @@ -31,198 +31,6 @@ #include <mach/platform.h> #include "common.h" /* * Watchdog timer */ static struct resource watchdog_resources[] = { [0] = { .start = LPC32XX_WDTIM_BASE, .end = LPC32XX_WDTIM_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, }; struct platform_device lpc32xx_watchdog_device = { .name = "pnx4008-watchdog", .id = -1, .num_resources = ARRAY_SIZE(watchdog_resources), .resource = watchdog_resources, }; /* * I2C busses */ static struct resource i2c0_resources[] = { [0] = { .start = LPC32XX_I2C1_BASE, .end = LPC32XX_I2C1_BASE + 0x100 - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_LPC32XX_I2C_1, .end = IRQ_LPC32XX_I2C_1, .flags = IORESOURCE_IRQ, }, }; static struct resource i2c1_resources[] = { [0] = { .start = LPC32XX_I2C2_BASE, .end = LPC32XX_I2C2_BASE + 0x100 - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_LPC32XX_I2C_2, .end = IRQ_LPC32XX_I2C_2, .flags = IORESOURCE_IRQ, }, }; static struct resource i2c2_resources[] = { [0] = { .start = LPC32XX_OTG_I2C_BASE, .end = LPC32XX_OTG_I2C_BASE + 0x100 - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_LPC32XX_USB_I2C, .end = IRQ_LPC32XX_USB_I2C, .flags = IORESOURCE_IRQ, }, }; struct platform_device lpc32xx_i2c0_device = { .name = "pnx-i2c.0", .id = 0, .num_resources = ARRAY_SIZE(i2c0_resources), .resource = i2c0_resources, }; struct platform_device lpc32xx_i2c1_device = { .name = "pnx-i2c.1", .id = 1, .num_resources = ARRAY_SIZE(i2c1_resources), .resource = i2c1_resources, }; struct platform_device lpc32xx_i2c2_device = { .name = "pnx-i2c.2", .id = 2, .num_resources = ARRAY_SIZE(i2c2_resources), .resource = i2c2_resources, }; /* TSC (Touch Screen Controller) */ static struct resource lpc32xx_tsc_resources[] = { { .start = LPC32XX_ADC_BASE, .end = LPC32XX_ADC_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, { .start = IRQ_LPC32XX_TS_IRQ, .end = IRQ_LPC32XX_TS_IRQ, .flags = IORESOURCE_IRQ, }, }; struct platform_device lpc32xx_tsc_device = { .name = "ts-lpc32xx", .id = -1, .num_resources = ARRAY_SIZE(lpc32xx_tsc_resources), .resource = lpc32xx_tsc_resources, }; /* RTC */ static struct resource lpc32xx_rtc_resources[] = { { .start = LPC32XX_RTC_BASE, .end = LPC32XX_RTC_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, },{ .start = IRQ_LPC32XX_RTC, .end = IRQ_LPC32XX_RTC, .flags = IORESOURCE_IRQ, }, }; struct platform_device lpc32xx_rtc_device = { .name = "rtc-lpc32xx", .id = -1, .num_resources = ARRAY_SIZE(lpc32xx_rtc_resources), .resource = lpc32xx_rtc_resources, }; /* * ADC support */ static struct resource adc_resources[] = { { .start = LPC32XX_ADC_BASE, .end = LPC32XX_ADC_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, { .start = IRQ_LPC32XX_TS_IRQ, .end = IRQ_LPC32XX_TS_IRQ, .flags = IORESOURCE_IRQ, }, }; struct platform_device lpc32xx_adc_device = { .name = "lpc32xx-adc", .id = -1, .num_resources = ARRAY_SIZE(adc_resources), .resource = adc_resources, }; /* * USB support */ /* The dmamask must be set for OHCI to work */ static u64 ohci_dmamask = ~(u32) 0; static struct resource ohci_resources[] = { { .start = IO_ADDRESS(LPC32XX_USB_BASE), .end = IO_ADDRESS(LPC32XX_USB_BASE + 0x100 - 1), .flags = IORESOURCE_MEM, }, { .start = IRQ_LPC32XX_USB_HOST, .flags = IORESOURCE_IRQ, }, }; struct platform_device lpc32xx_ohci_device = { .name = "usb-ohci", .id = -1, .dev = { .dma_mask = &ohci_dmamask, .coherent_dma_mask = 0xFFFFFFFF, }, .num_resources = ARRAY_SIZE(ohci_resources), .resource = ohci_resources, }; /* * Network Support */ static struct resource net_resources[] = { [0] = DEFINE_RES_MEM(LPC32XX_ETHERNET_BASE, SZ_4K), [1] = DEFINE_RES_MEM(LPC32XX_IRAM_BASE, SZ_128K), [2] = DEFINE_RES_IRQ(IRQ_LPC32XX_ETHERNET), }; static u64 lpc32xx_mac_dma_mask = 0xffffffffUL; struct platform_device lpc32xx_net_device = { .name = "lpc-eth", .id = 0, .dev = { .dma_mask = &lpc32xx_mac_dma_mask, .coherent_dma_mask = 0xffffffffUL, }, .num_resources = ARRAY_SIZE(net_resources), .resource = net_resources, }; /* * Returns the unique ID for the device */ Loading arch/arm/mach-lpc32xx/common.h +0 −14 Original line number Diff line number Diff line Loading @@ -22,19 +22,6 @@ #include <mach/board.h> #include <linux/platform_device.h> /* * Arch specific platform device structures */ extern struct platform_device lpc32xx_watchdog_device; extern struct platform_device lpc32xx_i2c0_device; extern struct platform_device lpc32xx_i2c1_device; extern struct platform_device lpc32xx_i2c2_device; extern struct platform_device lpc32xx_tsc_device; extern struct platform_device lpc32xx_adc_device; extern struct platform_device lpc32xx_rtc_device; extern struct platform_device lpc32xx_ohci_device; extern struct platform_device lpc32xx_net_device; /* * Other arch specific structures and functions */ Loading @@ -42,7 +29,6 @@ extern struct sys_timer lpc32xx_timer; extern void __init lpc32xx_init_irq(void); extern void __init lpc32xx_map_io(void); extern void __init lpc32xx_serial_init(void); extern void __init lpc32xx_gpio_init(void); extern void lpc23xx_restart(char, const char *); Loading Loading
Documentation/devicetree/bindings/arm/lpc32xx-mic.txt 0 → 100644 +38 −0 Original line number Diff line number Diff line * NXP LPC32xx Main Interrupt Controller (MIC, including SIC1 and SIC2 secondary controllers) Required properties: - compatible: Should be "nxp,lpc3220-mic" - interrupt-controller: Identifies the node as an interrupt controller. - interrupt-parent: Empty for the interrupt controller itself - #interrupt-cells: The number of cells to define the interrupts. Should be 2. The first cell is the IRQ number The second cell is used to specify mode: 1 = low-to-high edge triggered 2 = high-to-low edge triggered 4 = active high level-sensitive 8 = active low level-sensitive Default for internal sources should be set to 4 (active high). - reg: Should contain MIC registers location and length Examples: /* * MIC */ mic: interrupt-controller@40008000 { compatible = "nxp,lpc3220-mic"; interrupt-controller; interrupt-parent; #interrupt-cells = <2>; reg = <0x40008000 0xC000>; }; /* * ADC */ adc@40048000 { compatible = "nxp,lpc3220-adc"; reg = <0x40048000 0x1000>; interrupt-parent = <&mic>; interrupts = <39 4>; };
Documentation/devicetree/bindings/arm/lpc32xx.txt 0 → 100644 +8 −0 Original line number Diff line number Diff line NXP LPC32xx Platforms Device Tree Bindings ------------------------------------------ Boards with the NXP LPC32xx SoC shall have the following properties: Required root node property: compatible: must be "nxp,lpc3220", "nxp,lpc3230", "nxp,lpc3240" or "nxp,lpc3250"
arch/arm/Kconfig +1 −0 Original line number Diff line number Diff line Loading @@ -597,6 +597,7 @@ config ARCH_LPC32XX select USB_ARCH_HAS_OHCI select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select USE_OF help Support for the NXP LPC32XX family of processors Loading
arch/arm/mach-lpc32xx/common.c +0 −192 Original line number Diff line number Diff line Loading @@ -31,198 +31,6 @@ #include <mach/platform.h> #include "common.h" /* * Watchdog timer */ static struct resource watchdog_resources[] = { [0] = { .start = LPC32XX_WDTIM_BASE, .end = LPC32XX_WDTIM_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, }; struct platform_device lpc32xx_watchdog_device = { .name = "pnx4008-watchdog", .id = -1, .num_resources = ARRAY_SIZE(watchdog_resources), .resource = watchdog_resources, }; /* * I2C busses */ static struct resource i2c0_resources[] = { [0] = { .start = LPC32XX_I2C1_BASE, .end = LPC32XX_I2C1_BASE + 0x100 - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_LPC32XX_I2C_1, .end = IRQ_LPC32XX_I2C_1, .flags = IORESOURCE_IRQ, }, }; static struct resource i2c1_resources[] = { [0] = { .start = LPC32XX_I2C2_BASE, .end = LPC32XX_I2C2_BASE + 0x100 - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_LPC32XX_I2C_2, .end = IRQ_LPC32XX_I2C_2, .flags = IORESOURCE_IRQ, }, }; static struct resource i2c2_resources[] = { [0] = { .start = LPC32XX_OTG_I2C_BASE, .end = LPC32XX_OTG_I2C_BASE + 0x100 - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_LPC32XX_USB_I2C, .end = IRQ_LPC32XX_USB_I2C, .flags = IORESOURCE_IRQ, }, }; struct platform_device lpc32xx_i2c0_device = { .name = "pnx-i2c.0", .id = 0, .num_resources = ARRAY_SIZE(i2c0_resources), .resource = i2c0_resources, }; struct platform_device lpc32xx_i2c1_device = { .name = "pnx-i2c.1", .id = 1, .num_resources = ARRAY_SIZE(i2c1_resources), .resource = i2c1_resources, }; struct platform_device lpc32xx_i2c2_device = { .name = "pnx-i2c.2", .id = 2, .num_resources = ARRAY_SIZE(i2c2_resources), .resource = i2c2_resources, }; /* TSC (Touch Screen Controller) */ static struct resource lpc32xx_tsc_resources[] = { { .start = LPC32XX_ADC_BASE, .end = LPC32XX_ADC_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, { .start = IRQ_LPC32XX_TS_IRQ, .end = IRQ_LPC32XX_TS_IRQ, .flags = IORESOURCE_IRQ, }, }; struct platform_device lpc32xx_tsc_device = { .name = "ts-lpc32xx", .id = -1, .num_resources = ARRAY_SIZE(lpc32xx_tsc_resources), .resource = lpc32xx_tsc_resources, }; /* RTC */ static struct resource lpc32xx_rtc_resources[] = { { .start = LPC32XX_RTC_BASE, .end = LPC32XX_RTC_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, },{ .start = IRQ_LPC32XX_RTC, .end = IRQ_LPC32XX_RTC, .flags = IORESOURCE_IRQ, }, }; struct platform_device lpc32xx_rtc_device = { .name = "rtc-lpc32xx", .id = -1, .num_resources = ARRAY_SIZE(lpc32xx_rtc_resources), .resource = lpc32xx_rtc_resources, }; /* * ADC support */ static struct resource adc_resources[] = { { .start = LPC32XX_ADC_BASE, .end = LPC32XX_ADC_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, { .start = IRQ_LPC32XX_TS_IRQ, .end = IRQ_LPC32XX_TS_IRQ, .flags = IORESOURCE_IRQ, }, }; struct platform_device lpc32xx_adc_device = { .name = "lpc32xx-adc", .id = -1, .num_resources = ARRAY_SIZE(adc_resources), .resource = adc_resources, }; /* * USB support */ /* The dmamask must be set for OHCI to work */ static u64 ohci_dmamask = ~(u32) 0; static struct resource ohci_resources[] = { { .start = IO_ADDRESS(LPC32XX_USB_BASE), .end = IO_ADDRESS(LPC32XX_USB_BASE + 0x100 - 1), .flags = IORESOURCE_MEM, }, { .start = IRQ_LPC32XX_USB_HOST, .flags = IORESOURCE_IRQ, }, }; struct platform_device lpc32xx_ohci_device = { .name = "usb-ohci", .id = -1, .dev = { .dma_mask = &ohci_dmamask, .coherent_dma_mask = 0xFFFFFFFF, }, .num_resources = ARRAY_SIZE(ohci_resources), .resource = ohci_resources, }; /* * Network Support */ static struct resource net_resources[] = { [0] = DEFINE_RES_MEM(LPC32XX_ETHERNET_BASE, SZ_4K), [1] = DEFINE_RES_MEM(LPC32XX_IRAM_BASE, SZ_128K), [2] = DEFINE_RES_IRQ(IRQ_LPC32XX_ETHERNET), }; static u64 lpc32xx_mac_dma_mask = 0xffffffffUL; struct platform_device lpc32xx_net_device = { .name = "lpc-eth", .id = 0, .dev = { .dma_mask = &lpc32xx_mac_dma_mask, .coherent_dma_mask = 0xffffffffUL, }, .num_resources = ARRAY_SIZE(net_resources), .resource = net_resources, }; /* * Returns the unique ID for the device */ Loading
arch/arm/mach-lpc32xx/common.h +0 −14 Original line number Diff line number Diff line Loading @@ -22,19 +22,6 @@ #include <mach/board.h> #include <linux/platform_device.h> /* * Arch specific platform device structures */ extern struct platform_device lpc32xx_watchdog_device; extern struct platform_device lpc32xx_i2c0_device; extern struct platform_device lpc32xx_i2c1_device; extern struct platform_device lpc32xx_i2c2_device; extern struct platform_device lpc32xx_tsc_device; extern struct platform_device lpc32xx_adc_device; extern struct platform_device lpc32xx_rtc_device; extern struct platform_device lpc32xx_ohci_device; extern struct platform_device lpc32xx_net_device; /* * Other arch specific structures and functions */ Loading @@ -42,7 +29,6 @@ extern struct sys_timer lpc32xx_timer; extern void __init lpc32xx_init_irq(void); extern void __init lpc32xx_map_io(void); extern void __init lpc32xx_serial_init(void); extern void __init lpc32xx_gpio_init(void); extern void lpc23xx_restart(char, const char *); Loading