Commit f586fea8 authored by Jake Wang's avatar Jake Wang Committed by Alex Deucher
Browse files

drm/amd/display: Ensure DCN save after VM setup 



[Why]
DM initializes VM context after DMCUB initialization.
This results in loss of DCN_VM_CONTEXT registers after z10.

[How]
Notify DMCUB when VM setup is complete, and have DMCUB
save init registers.

v2: squash in CONFIG_DRM_AMD_DC_DCN3_1 fix

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: default avatarWayne Lin <wayne.lin@amd.com>
Signed-off-by: default avatarJake Wang <haonan.wang2@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 58aa1c50

drivers/gpu/drm/amd/display/dc/core/dc.c

+6 −0
Original line number Diff line number Diff line
@@ -1549,6 +1549,12 @@ void dc_z10_restore(struct dc *dc) 
	if (dc->hwss.z10_restore)

		dc->hwss.z10_restore(dc);

}



void dc_z10_save_init(struct dc *dc)

{

	if (dc->hwss.z10_save_init)

		dc->hwss.z10_save_init(dc);

}

#endif

/*

 * Applies given context to HW and copy it into current context.

drivers/gpu/drm/amd/display/dc/core/dc_vm_helper.c

+3 −0
Original line number Diff line number Diff line
@@ -47,6 +47,9 @@ int dc_setup_system_context(struct dc *dc, struct dc_phy_addr_space_config *pa_c 
		 */

		memcpy(&dc->vm_pa_config, pa_config, sizeof(struct dc_phy_addr_space_config));

		dc->vm_pa_config.valid = true;

#if defined(CONFIG_DRM_AMD_DC_DCN)

		dc_z10_save_init(dc);

#endif

	}



	return num_vmids;

drivers/gpu/drm/amd/display/dc/dc.h

+1 −0
Original line number Diff line number Diff line
@@ -1338,6 +1338,7 @@ void dc_hardware_release(struct dc *dc); 
bool dc_set_psr_allow_active(struct dc *dc, bool enable);

#if defined(CONFIG_DRM_AMD_DC_DCN)

void dc_z10_restore(struct dc *dc);

void dc_z10_save_init(struct dc *dc);

#endif



bool dc_enable_dmub_notifications(struct dc *dc);

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c

+12 −0
Original line number Diff line number Diff line
@@ -407,6 +407,18 @@ void dcn31_update_info_frame(struct pipe_ctx *pipe_ctx) 
			&pipe_ctx->stream_res.encoder_info_frame);

	}

}

void dcn31_z10_save_init(struct dc *dc)

{

	union dmub_rb_cmd cmd;



	memset(&cmd, 0, sizeof(cmd));

	cmd.dcn_restore.header.type = DMUB_CMD__IDLE_OPT;

	cmd.dcn_restore.header.sub_type = DMUB_CMD__IDLE_OPT_DCN_SAVE_INIT;



	dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd);

	dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv);

	dc_dmub_srv_wait_idle(dc->ctx->dmub_srv);

}



void dcn31_z10_restore(struct dc *dc)

{

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.h

+1 −0
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ void dcn31_enable_power_gating_plane( 
void dcn31_update_info_frame(struct pipe_ctx *pipe_ctx);



void dcn31_z10_restore(struct dc *dc);

void dcn31_z10_save_init(struct dc *dc);



void dcn31_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);

int dcn31_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config);