Unverified Commit f585a667 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!4676 [OLK-6.6] kabi/iommu: Backport patches from upstream and maintainer tree 

Merge Pull Request from: @x56Jason 
 
# Description
Due to the active upstream development activities, iommu will be under dramatic code changing in the near future, which impacts KABI heavily.

This is to backport critical iommu patches from upstream and maintainer tree, so that we can make the kabi maintenance a bit easier after formal release.

# Issue
#I938E2 

# Test
- Build and Boot on Intel platform
    - build with allmodconfig: PASS
    - build and boot with openeuler_defconfig: PASS
- Kernel Selftest on Intel platform
    - iommu kernel selftest (with known upstream issue workaround): All PASS 
    - x86 kernel selftest
        - All PASS except LAM/shadow-stack which is not enabled and the result is the same as in baseline
- VM Test on Intel platform:
    - Using Qemu to passthrough a NIC to guest VM, which exercises traditional VFIO/IOMMU code
        - Guest VM can run successfully and the NIC works well
- SVA Test on Intel platform
    - Use DSA device (SVA enabled) on Intel EMR platform to do memory copy
        - PASS, and IO page fault can be seen and handled successfully 

# Known Issue
NA

# Default Kernel Config Change
NA
 
 
Link:https://gitee.com/openeuler/kernel/pulls/4676

 

Reviewed-by: default avatarWeilong Chen <chenweilong@huawei.com>
Reviewed-by: default avatarKevin Zhu <zhukeqian1@huawei.com>
Reviewed-by: default avatarAichun Shi <aichun.shi@intel.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parents 54465add ed739b8f

Documentation/admin-guide/kernel-parameters.txt

+5 −4
Original line number Diff line number Diff line
@@ -2278,7 +2278,7 @@ 
			  forcing Dual Address Cycle for PCI cards supporting

			  greater than 32-bit addressing.



	iommu.strict=	[ARM64, X86] Configure TLB invalidation behaviour

	iommu.strict=	[ARM64, X86, S390] Configure TLB invalidation behaviour

			Format: { "0" | "1" }

			0 - Lazy mode.

			  Request that DMA unmap operations use deferred
@@ -5725,9 +5725,10 @@ 
	s390_iommu=	[HW,S390]

			Set s390 IOTLB flushing mode

		strict

			With strict flushing every unmap operation will result in

			an IOTLB flush. Default is lazy flushing before reuse,

			which is faster.

			With strict flushing every unmap operation will result

			in an IOTLB flush. Default is lazy flushing before

			reuse, which is faster. Deprecated, equivalent to

			iommu.strict=1.



	s390_iommu_aperture=	[KNL,S390]

			Specifies the size of the per device DMA address space

Documentation/devicetree/bindings/iommu/apple,dart.yaml

+1 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ properties: 
  compatible:

    enum:

      - apple,t8103-dart

      - apple,t8103-usb4-dart

      - apple,t8110-dart

      - apple,t6000-dart

MAINTAINERS

+0 −1
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@@ -10983,7 +10983,6 @@ F: drivers/iommu/ 
F:	include/linux/iommu.h

F:	include/linux/iova.h

F:	include/linux/of_iommu.h

F:	include/uapi/linux/iommu.h









IOMMUFD









M:	Jason Gunthorpe <jgg@nvidia.com>
































arch/Kconfig



+5
−0






























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Diff line number
Diff line







@@ -301,6 +301,11 @@ config ARCH_HAS_DMA_CLEAR_UNCACHED







config ARCH_HAS_CPU_FINALIZE_INIT









	bool



















# The architecture has a per-task state that includes the mm's PASID









config ARCH_HAS_CPU_PASID









	bool









	select IOMMU_MM_DATA



















# Select if arch init_task must go in the __init_task_data section









config ARCH_TASK_STRUCT_ON_STACK









	bool
































arch/arc/mm/dma.c



+1
−1






























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Diff line







@@ -91,7 +91,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,







 * Plug in direct dma map ops.









 */









void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,









			const struct iommu_ops *iommu, bool coherent)









			bool coherent)









{









	/*









	 * IOC hardware snoops all DMA traffic keeping the caches consistent