Commit f50160cf authored by Stanley.Yang's avatar Stanley.Yang Committed by Alex Deucher
Browse files

drm/amdgpu: force enable gfx ras for vega20 ws 



Signed-off-by: default avatarStanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b86e7eef

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

+21 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ 
#include "amdgpu_atomfirmware.h"

#include "amdgpu_xgmi.h"

#include "ivsrcid/nbio/irqsrcs_nbif_7_4.h"

#include "atom.h"



static const char *RAS_FS_NAME = "ras";
@@ -2063,6 +2064,24 @@ static bool amdgpu_ras_asic_supported(struct amdgpu_device *adev) 
		adev->asic_type == CHIP_SIENNA_CICHLID;

}



/*

 * this is workaround for vega20 workstation sku,

 * force enable gfx ras, ignore vbios gfx ras flag

 * due to GC EDC can not write

 */

static void amdgpu_ras_get_quirks(struct amdgpu_device *adev,

		uint32_t *hw_supported)

{

	struct atom_context *ctx = adev->mode_info.atom_context;



	if (!ctx)

		return;



	if (strnstr(ctx->vbios_version, "D16406",

				sizeof(ctx->vbios_version)))

			*hw_supported |= (1 << AMDGPU_RAS_BLOCK__GFX);

}



/*

 * check hardware's ras ability which will be saved in hw_supported.

 * if hardware does not support ras, we can skip some ras initializtion and
@@ -2106,6 +2125,8 @@ static void amdgpu_ras_check_supported(struct amdgpu_device *adev, 
				1 << AMDGPU_RAS_BLOCK__MMHUB);

	}



	amdgpu_ras_get_quirks(adev, hw_supported);



	/* hw_supported needs to be aligned with RAS block mask. */

	*hw_supported &= AMDGPU_RAS_BLOCK_MASK;