Commit f4fd84ae authored by Thinh Nguyen's avatar Thinh Nguyen Committed by Greg Kroah-Hartman
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usb: dwc3: core: Only handle soft-reset in DCTL 



Make sure not to set run_stop bit or link state change request while
initiating soft-reset. Register read-modify-write operation may
unintentionally start the controller before the initialization completes
with its previous DCTL value, which can cause initialization failure.

Fixes: f59dcab1 ("usb: dwc3: core: improve reset sequence")
Cc: <stable@vger.kernel.org>
Signed-off-by: default avatarThinh Nguyen <Thinh.Nguyen@synopsys.com>
Link: https://lore.kernel.org/r/6aecbd78328f102003d40ccf18ceeebd411d3703.1650594792.git.Thinh.Nguyen@synopsys.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent bf95c4d4

drivers/usb/dwc3/core.c

+2 −1
Original line number Diff line number Diff line
@@ -274,7 +274,8 @@ int dwc3_core_soft_reset(struct dwc3 *dwc) 


	reg = dwc3_readl(dwc->regs, DWC3_DCTL);

	reg |= DWC3_DCTL_CSFTRST;

	dwc3_writel(dwc->regs, DWC3_DCTL, reg);

	reg &= ~DWC3_DCTL_RUN_STOP;

	dwc3_gadget_dctl_write_safe(dwc, reg);



	/*

	 * For DWC_usb31 controller 1.90a and later, the DCTL.CSFRST bit