Commit f4411786 authored by Stefan Riedmueller's avatar Stefan Riedmueller Committed by Shawn Guo
Browse files

ARM: dts: imx6ull: Add support for PHYTEC phyBOARD-Segin with i.MX 6ULL



In addition to the PHYTEC phyCORE-i.MX 6UL the PHYTEC phyBOARD-Segin is
also available with the PHYTEC phyCORE-i.MX 6ULL. So this adds support
for this SOM and its baseboards.

It comes in a full featured option with either NAND flash or eMMC and in
a low cost option only available with NAND flash.

The hardware specs are:

 - Full featured with NAND or eMMC:
    * i.MX 6ULL Y2
    * 512MB DDR3 memory
    * 512MB NAND flash or 4GB/8GB eMMC
    * Dual 10/100 Ethernet
    * USB Host and USB OTG
    * RS232
    * MicroSD external storage
    * Audio, RS232, I2C, SPI, CAN headers
    * Further I/O options via A/V and Expansion headers

 - Low cost with NAND:
    * i.MX 6ULL Y0
    * 256MB DDR3 memory
    * 128MB NAND flash
    * Single 10/100 Ethernet
    * USB OTG
    * RS232
    * MicroSD external storage
    * I2C
    * Further I/O options via Expansion headers

Signed-off-by: default avatarStefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 9ae6390a
Loading
Loading
Loading
Loading
+3 −0
Original line number Diff line number Diff line
@@ -580,6 +580,9 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
	imx6ull-14x14-evk.dtb \
	imx6ull-colibri-eval-v3.dtb \
	imx6ull-colibri-wifi-eval-v3.dtb \
	imx6ull-phytec-segin-ff-rdk-nand.dtb \
	imx6ull-phytec-segin-ff-rdk-emmc.dtb \
	imx6ull-phytec-segin-lc-rdk-nand.dtb \
	imx6ulz-14x14-evk.dtb
dtb-$(CONFIG_SOC_IMX7D) += \
	imx7d-cl-som-imx7.dtb \
+24 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2019 PHYTEC Messtechnik GmbH
 * Author: Stefan Riedmueller <s.riedmueller@phytec.de>
 */

#include "imx6ul-phytec-phycore-som.dtsi"

/ {
	model = "PHYTEC phyCORE-i.MX6 ULL";
	compatible = "phytec,imx6ull-pcl063", "fsl,imx6ull";
};

&iomuxc {
	/delete-node/ gpioledssomgrp;
};

&iomuxc_snvs {
	pinctrl_gpioleds_som: gpioledssomgrp {
		fsl,pins = <
			MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04	0x0b0b0
		>;
	};
};
+93 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2019 PHYTEC Messtechnik GmbH
 * Author: Stefan Riedmueller <s.riedmueller@phytec.de>
 */

/dts-v1/;
#include "imx6ull.dtsi"
#include "imx6ull-phytec-phycore-som.dtsi"
#include "imx6ull-phytec-segin.dtsi"
#include "imx6ull-phytec-segin-peb-eval-01.dtsi"

/ {
	model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with eMMC";
	compatible = "phytec,imx6ull-pbacd10-emmc", "phytec,imx6ull-pbacd10",
		     "phytec,imx6ull-pcl063","fsl,imx6ull";
};

&adc1 {
	status = "okay";
};

&can1 {
	status = "okay";
};

&tlv320 {
	status = "okay";
};

&ecspi3 {
	status = "okay";
};

&ethphy1 {
	status = "okay";
};

&ethphy2 {
	status = "okay";
};

&fec1 {
	status = "okay";
};

&fec2 {
	status = "okay";
};

&i2c_rtc {
	status = "okay";
};

&reg_can1_en {
	status = "okay";
};

&reg_sound_1v8 {
	status = "okay";
};

&reg_sound_3v3 {
	status = "okay";
};

&sai2 {
	status = "okay";
};

&sound {
	status = "okay";
};

&uart5 {
	status = "okay";
};

&usbotg1 {
	status = "okay";
};

&usbotg2 {
	status = "okay";
};

&usdhc1 {
	status = "okay";
};

&usdhc2 {
	status = "okay";
};
+93 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2019 PHYTEC Messtechnik GmbH
 * Author: Stefan Riedmueller <s.riedmueller@phytec.de>
 */

/dts-v1/;
#include "imx6ull.dtsi"
#include "imx6ull-phytec-phycore-som.dtsi"
#include "imx6ull-phytec-segin.dtsi"
#include "imx6ull-phytec-segin-peb-eval-01.dtsi"

/ {
	model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with NAND";
	compatible = "phytec,imx6ull-pbacd10-nand", "phytec,imx6ull-pbacd10",
		     "phytec,imx6ull-pcl063", "fsl,imx6ull";
};

&adc1 {
	status = "okay";
};

&can1 {
	status = "okay";
};

&tlv320 {
	status = "okay";
};

&ecspi3 {
	status = "okay";
};

&ethphy1 {
	status = "okay";
};

&ethphy2 {
	status = "okay";
};

&fec1 {
	status = "okay";
};

&fec2 {
	status = "okay";
};

&gpmi {
	status = "okay";
};

&i2c_rtc {
	status = "okay";
};

&reg_can1_en {
	status = "okay";
};

&reg_sound_1v8 {
	status = "okay";
};

&reg_sound_3v3 {
	status = "okay";
};

&sai2 {
	status = "okay";
};

&sound {
	status = "okay";
};

&uart5 {
	status = "okay";
};

&usbotg1 {
	status = "okay";
};

&usbotg2 {
	status = "okay";
};

&usdhc1 {
	status = "okay";
};
+45 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2019 PHYTEC Messtechnik GmbH
 * Author: Stefan Riedmueller <s.riedmueller@phytec.de>
 */

/dts-v1/;
#include "imx6ull.dtsi"
#include "imx6ull-phytec-phycore-som.dtsi"
#include "imx6ull-phytec-segin.dtsi"
#include "imx6ull-phytec-segin-peb-eval-01.dtsi"

/ {
	model = "PHYTEC phyBOARD-Segin i.MX6 ULL Low Cost with NAND";
	compatible = "phytec,imx6ull-pbacd10-nand", "phytec,imx6ull-pbacd10",
		     "phytec,imx6ull-pcl063", "fsl,imx6ull";
};

&adc1 {
	status = "okay";
};

&ethphy1 {
	status = "okay";
};

&fec1 {
	status = "okay";
};

&gpmi {
	status = "okay";
};

&i2c_rtc {
	status = "okay";
};

&usbotg1 {
	status = "okay";
};

&usdhc1 {
	status = "okay";
};
Loading